Fairchild FQPF7N20L service manual

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200V LOGIC N-Channel MOSFET
December 2000
QFET
QFET
QFETQFET
FQPF7N20L
TM
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are well suited for high efficiency switching DC/DC conv erte rs, switch mode power supplies, and motor control.
GSD
Absolute Maximum Ratings T
Symbol Parameter FQPF7N20L Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt P
D
T
, T
J
STG
T
L
Drain-Source Voltage 200 V Drain Current
Drain Current - Pulsed Gate-Source Voltage ± 20 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Power Dissipation (TC = 25°C)
Operating and Storage Temperature Range -55 to +150 °C Maximum lead temperature for soldering purposes,
1/8 from case for 5 seconds
- Continuous (T
- Continuous (T
- Derate above 25°C 0.3 W/°C
TO-220F
FQPF Series
= 25°C unless otherwise noted
C
= 25°C)
C
= 100°C)
C
Features
• 5.0A, 200V, R
• Low gate charge ( typical 6.8 nC)
• Low Crss ( typical 8.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• Low level gate drive requirement allowing direct operation from logic drivers
G
(Note 1)
(Note 2) (Note 1) (Note 1) (Note 3)
= 0.75Ω @VGS = 10 V
DS(on)
D
!
!
"
"
"
"
!
!
"
!
!
" "
"
!
!
S
5.0 A
3.16 A 20 A
73 mJ
5.0 A
3.7 mJ
5.5 V/ns 37 W
300 °C
Thermal Characteristics
Symbol Parameter Typ Max Units
R
θJC
R
θJA
©2000 Fairchild Semiconductor International
Thermal Resistance, Junction-to-Case -- 3.38 °C/W Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W
Rev. A2, December 2000
FQPF7N20L
Electrical Characteristics T
= 25°C unless otherwise noted
C
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
BV
DSS
/ ∆T I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage Breakdown Voltage Temperature
Coefficient
J
Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
= 0 V, ID = 250 µA
V
GS
I
= 250 µA, Referenced to 25°C
D
V
= 200 V, VGS = 0 V
DS
V
= 160 V, TC = 125°C
DS
V
= 20 V, VDS = 0 V
GS
= -20 V, VDS = 0 V
V
GS
200 -- -- V
-- 0.17 -- V/°C
-- -- 1 µA
-- -- 10 µA
-- -- 100 nA
-- -- -100 nA
On Characteristics
V R
g
FS
GS(th)
DS(on)
Gate Threshold Voltage Static Drain-Source
On-Resistance Forward Transconductance
V
= VGS, ID = 250 µA
DS
V
= 10 V, ID = 2.5 A
GS
= 5 V, ID = 2.5 A
V
GS
V
= 30 V, ID = 2.5 A
DS
(Note 4)
1.0 -- 2.0 V
0.59
--
0.62
0.75
0.78
-- 5.3 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance -- 55 70 pF Reverse Transfer Capacitance -- 8.5 11 pF
= 25 V, VGS = 0 V,
V
DS
f = 1.0 MHz
-- 390 500 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q Q Q
g gs gd
Turn-On Delay Time Turn-On Rise Time -- 125 260 ns Turn-Off Delay Time -- 20 50 ns Turn-Off Fall Time -- 65 140 ns Total Gate Charge Gate-Source Charge -- 1.6 -- nC Gate-Drain Charge -- 3.4 -- nC
= 100 V, ID = 6.5 A,
V
DD
= 25
R
G
= 160 V, ID = 6.5 A,
V
DS
V
GS
= 5 V
(Note 4, 5)
(Note 4, 5)
-- 12 35 ns
-- 6.8 9.0 nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 4.4mH, IAS = 5.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 6.5A, di/dt 300A/µs, VDD BV
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Maximum Continuous Drain-Source Diode Forward Current -- -- 5.0 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 20 A
= 0 V, IS = 5.0 A
Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 0.44 -- µC
Starting TJ = 25°C
DSS,
V
GS
= 0 V, IS = 6.5 A,
V
GS
/ dt = 100 A/µs
dI
F
(Note 4)
-- -- 1.5 V
-- 110 -- ns
Rev. A2, December 2000
Typical Characteristics
FQPF7N20L
V
GS
Top : 10 V
1
8.0 V
10
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V Botto m : 3.0 V
0
10
, Drain Current [A]
D
I
-1
10
-1
10
0
10
Notes :
1. 250μs Pulse Test
2. T
= 25
C
1
10
VDS, Drain-Source Voltage [V]
4
3
[],
2
DS(on)
R
1
Drain-Source On-Resistance
0
03691215
VGS = 10V
VGS = 5V
Note : T
= 25
J
ID , Drai n Curren t [A]
1
10
150
0
10
, Drain Current [A]
D
25
I
-55
-1
10
0246810
Notes :
1. V
= 30V
DS
2. 250μs Pulse Test
VGS, Gate-Source V oltage [V]
Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s
1
10
0
10
, Reverse Drain Current [A]
DR
I
-1
10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
150
25
Notes :
= 0V
1. V
GS
2. 250μs Pulse Test
VSD, Sou r c e-Drain voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
800
600
400
Capacitance [pF]
200
0
-1
10
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Ch a ra ct eristics
©2000 Fairchild Semiconductor International
C C C
C
iss
C
oss
C
rss
0
10
VDS, Drain-Source Voltage [V]
= Cgs + Cgd (Cds = shorted)
iss
= Cds + C
oss
gd
= C
rss
gd
Notes :
1. V
= 0 V
GS
2. f = 1 M Hz
1
10
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
VDS = 40V
Note : I
= 6.5 A
D
Rev. A2, December 2000
12
10
8
VDS = 100V
VDS = 160V
6
4
, Gate-Source Voltage [V]
2
GS
V
0
03691215
QG, Tota l Gate Charge [n C]
Typical Characteristics (Continued)
FQPF7N20L
1.2
1.1
1.0
, (Normalized)
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-100 -50 0 50 100 150 200
1. V
2. I
Notes :
TJ, Junction Temperature [oC]
Figure 7. Breakdown Voltage Variation
vs. Temperature
DS(on)
Notes :
1. T
= 25 oC
C
= 150 oC
2. T
J
3. Single Pulse
1
10
1 ms
10 ms
100 ms
DC
2
10
2
10
Operation in This Area is Limited by R
1
10
0
10
, Drain Current [A]
D
I
-1
10
0
10
VDS, Drain-Source Voltage [V]
GS
= 250
D
= 0 V
100 µs
3.0
2.5
2.0
μ
A
1.5
, (No rmaliz e d )
1.0
DS(ON)
R
Drain-Source On-Resistance
0.5
0.0
-100 -50 0 50 100 150 200
Notes :
= 10 V
1. V
GS
2. I
= 3.25 A
D
TJ, Junction Temperature [oC]
Figure 8. On-Resistance Variation
vs. Temperature
5
4
3
2
, Drain Current [A]
D
I
1
0
25 50 75 100 125 150
TC, Case Temperature [℃]
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
©2000 Fairchild Semiconductor International
vs. Case Temperature
D=0.5
0
10
0.2
0.1
0.05
-1
10
0.02
0.01
(t), Therm al Response
JC
θ
Z
-2
10
-5
10
single pulse
-4
10
-3
10
-2
10
N o te s :
1. Z
(t) = 3.38 ℃/W M a x .
θ
JC
2. D u ty F a c to r, D = t
3. TJM - TC = PDM * Z
P
DM
t
1
t
2
-1
10
10
1/t2
(t)
θ
JC
0
1
10
t1, S q u a re W av e P u ls e D u ra tio n [s ec ]
Figure 11. Transient Thermal Response Cur ve
Rev. A2, December 2000
12V
12V
200nF
200nF
3mA
3mA
50K
50K
FQPF7N20L
Gate Charge Test Circuit & Waveform
V
V
GS
DS
DS
5V
5V
GS
Q
Q
g
g
Q
Q
gs
gs
Q
Q
gd
gd
Charge
Charge
Same Type
Ω
Ω
300nF
300nF
V
V
GS
GS
Same Type
as DUT
as DUT
DUT
DUT
V
V
Resistive Switching Test Circuit & Waveforms
5V
5V
10V
10V
R
R
L
DUT
DUT
L
V
V
DD
DD
V
V
DS
DS
V
V
GS
GS
R
R
G
G
V
V
DS
DS
90%
90%
10%
10%
V
V
GS
GS
t
t
d(on)tr
d(on)tr
t
t
on
on
t
t
d(off)
d(off)
t
t
f
f
t
t
off
off
Unclamped Inductive Switching Test Circuit & Waveforms
BV
BV
DSS
L
LL
V
V
DS
DS
BV
BV
DSS
V
V
DSS
I
I
AS
AS
DD
DD
I
IDI
D
D
R
R
G
G
DUT
DUT
t
t
p
p
V
V
DD
DD
1
1
1
1
----
----
----
----
E
E
=LI
E
=LI
=LI
AS
AS
AS
2
2
2
2
2
2
2
AS
AS
AS
(t)
(t)
I
I
D
D
t
t
p
p
DSS
--------------------
-------------------­BV
BV
DSS-VDD
DSS-VDD
Time
Time
V
(t)
V
(t)
DS
DS
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
Peak Diode Recovery dv /d t Test Circuit & Waveforms
+
DUT
DUT
I
I
SD
SD
Driver
Driver
R
R
G
G
V
V
GS
GS
+
V
V
DS
DS
_
_
L
LL
Same Type
Same Type
as DUT
as DUT
• dv/dt controlled by R
• dv/dt controlled by R
•ISDcontroll ed by pulse peri od
•ISDcontroll ed by pulse peri od
G
G
FQPF7N20L
V
V
DD
DD
V
V
GS
GS
( Driver )
( Driver )
I
I
SD
SD
( DUT )
( DUT )
V
V
DS
DS
( DUT )
( DUT )
Gate Pulse Width
Gate Pulse Width
Gate Pulse Width
--------------------------
--------------------------
--------------------------
D =
D =
D =
Gate Pulse Period
Gate Pulse Period
Gate Pulse Period
IFM, Body Diode Forward Current
IFM, Body Diode Forward Current
I
I
RM
RM
Body Diode Reverse Current
Body Diode Reverse Current
Body Diode Recoverydv/dt
Body Diode Recoverydv/dt
V
V
SD
SD
Body Diode
Body Diode
Forward Voltage Drop
Forward Voltage Drop
di/dt
di/dt
10V
10V
V
V
DD
DD
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
Package Dimensions
10.16 ±0.20
TO-220F
ø3.18 ±0.10
2.54
FQPF7N20L
±0.20
3.30 ±0.10
15.80 ±0.20
9.75 ±0.30
MAX1.47
0.80 ±0.10
(7.00)
(30°)
6.68 ±0.20
(1.00x45°)
(0.70)
15.87 ±0.20
0.35 ±0.10
2.54TYP
[2.54
±0.20]
©2000 Fairchild Semiconductor International
#1
9.40 ±0.20
2.54TYP
[2.54
±0.20]
4.70 ±0.20
0.50
+0.10 –0.05
2.76 ±0.20
Rev. A2, December 2000
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ Bottomless™ CoolFET™ CROSSVOLT™
2
E
CMOS™ FACT™ FACT Quiet Series™
®
FAST FASTr™ GTO™
HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench
®
QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6
SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL.
As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design
Preliminary First Producti on This datasheet contains preliminary data, and
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Obsolete Not In Production This datasheet contains specifications on a product
©2000 Fairchild Semiconductor International
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Semiconductor reserves the right to make changes at any time without notice in order to improve design.
that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. A, January 2000
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