QFET
FQN1N60C 600V N-Channel MOSFET
®
FQN1N60C
600V N-Channel MOSFET
Features
• 0.3 A, 600 V, R
• Low gate charge ( typical 4.8 nC )
• Low Crss ( typical 3.5 pF)
• Fast switching
• 100 % avalanche tested
• Improved dv/dt capability
= 11.5 Ω @ V
DS(on)
= 10 V
GS
TO-92
SDG
SSN Series
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficiency switched mode power supplies, active power factor
correction, electronic lamp ballasts based on half bridge
topology.
D
!!!!
!!!!
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◀◀◀◀
▲▲▲▲
▲▲▲▲
●●●●
!!!!
!!!!
G
●●●●
●●●●
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!!!!
S
Absolute Maximum Ratings
Symbol Parameter FQN1N60C Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt
P
D
T
, T
J
STG
T
L
Drain-Source Voltage 600 V
Drain Current - Continuous (TC = 25°C) 0.3 A
- Continuous (T
Drain Current - Pulsed
= 100°C) 0.18 A
C
(Note 1)
1.2 A
Gate-Source Voltage ± 30 V
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
(Note 2)
(Note 1)
(Note 1)
(Note 3)
33 mJ
0.3 A
0.3 mJ
4.5 V/ns
Power Dissipation (TA = 25°C) 1 W
Power Dissipation (T
= 25°C) 3 W
L
- Derate above 25°C 0.02 W/°C
Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
300 °C
1/8" from case for 5 seconds
Thermal Characteristics
Symbol Parameter Typ Max Units
R
θJL
R
θJA
Thermal Resistance, Junction-to-Lead
Thermal Resistance, Junction-to-Ambient
(Note 6a)
-- 50 °C/W
(Note 6b)
-- 140 °C/W
©2005 Fairchild Semiconductor Corporation
FQN1N60C Rev. A
1
www.fairchildsemi.com
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
1N60C FQN1N60C TO-92 -- -- 2000ea
FQN1N60C 600V N-Channel MOSFET
Electrical Characteristics
TC = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min. Typ. Max. Units
Off Characteristics
BV
∆BV
∆T
I
DSS
I
GSSF
I
GSSR
DSS
J
DSS
Drain-Source Breakdown Voltage VGS = 0 V, I
/
Breakdown Voltage Temperature
Coefficient
I
= 250 µA, Referenced to 25°C -- 0.6 -- V/°C
D
Zero Gate Voltage Drain Current VDS = 600 V, V
V
= 480 V, T
DS
Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
= 250 µA 600 -- -- V
D
= 0 V -- -- 50 µA
GS
= 125°C -- -- 250 µA
C
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Gate Threshold Voltage VDS = VGS, I
Static Drain-Source
VGS = 10 V, I
On-Resistance
Forward Transconductance VDS = 40 V, ID = 0.3 A
= 250 µA2.0--4.0V
D
= 0.15 A -- 9.3 11.5 Ω
D
(Note 4)
-- 0.75 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance VDS = 25 V, VGS = 0 V,
Output Capacitance -- 19 25 pF
Reverse Transfer Capacitance -- 3.5 6 pF
f = 1.0 MHz
-- 130 170 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time VDD = 300 V, ID = 1.1 A,
R
= 25 Ω
Turn-On Rise Time -- 21 52 ns
G
Turn-Off Delay Time -- 13 36 ns
Turn-Off Fall Time -- 27 64 ns
Total Gate Charge VDS = 480 V, ID = 1.1 A,
V
= 10 V
Gate-Source Charge -- 0.7 -- nC
GS
Gate-Drain Charge -- 2.7 -- nC
Drain-Source Diode Characteristics and M axi mu m Rat ing s
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 59mH, IAS = 1.1A, VDD = 50V, R
3. I
≤ 0.3A, di/dt ≤ 200A/µs, VDD ≤ BV
SD
4. Pulse Test : Pul se width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
6. a) Reference point of the R
b) When mounted on 3”x4.5” FR-4 PCB without any pad copper in a still air environment
(R
JA
θ
Maximum Continuous Drain-Source Diode Forward Current -- -- 0.3 A
Maximum Pulsed Drain-Source Diode Forward Current -- -- 1.2 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.3 A -- -- 1.4 V
Reverse Recovery Time VGS = 0 V, IS = 1.1 A,
dI
/ dt = 100 A/µs
Reverse Recovery Charge
= 25 Ω, Starting T
G
Starting TJ = 25°C
DSS,
is the drain lead
JL
θ
is the sum of the junction-to-case and case-to-ambient thermal resistance. R
= 25°C
J
F
(Note 4, 5)
(Note 4, 5)
(Note 4)
is determined by the user’s board design)
CA
θ
-- 7 24 ns
-- 4.8 6.2 nC
-- 190 -- ns
-- 0.53 -- µC
FQN1N60C Rev. A
2
www.fairchildsemi.com
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
-55oC
※
1. VDS = 40V
2. 250µ s Pulse Test
V
GS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
0
6.5 V
10
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
0
10
150oC
-1
10
, Drain Current [A]
D
I
-2
10
-1
10
0
10
VDS, Drain-Source Volt age [ V]
Notes :
※
1. 250µs Pul se Test
2. T
= 25
℃
C
1
10
25oC
, Drain Current [A]
D
I
-1
10
246810
VGS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue
FQN1N60C 600V N-Channel MOSFET
Notes :
30
25
VGS = 10V
20
[Ω ],
15
DS(ON)
R
10
Drain-Source On-Resistance
5
0
0.00.51.01.52.02.5
VGS = 20V
Note : T
※
= 25
℃
J
ID, Drain Current [A]
0
10
150
℃
Notes :
※
25
℃
, Reverse Drain Current [A]
-1
DR
10
I
0.2 0.4 0.6 0.8 1.0 1.2 1.4
1. VGS = 0V
2. 250µ s Pulse Test
VSD, Source-Drai n vo lt ag e [V ]
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
250
200
150
100
Capacitance [pF]
50
0
-1
10
C
= Cgs + Cgd (Cds = shorted)
iss
C
= Cds + C
oss
gd
C
= C
rss
gd
C
iss
C
oss
Notes ;
※
C
rss
0
10
1. VGS = 0 V
2. f = 1 MHz
1
10
VDS, Drai n-Source Vol tage [V]
12
10
VDS = 120V
VDS = 300V
8
6
4
, Gate-Source Voltage [V]
2
GS
V
0
0123456
VDS = 480V
QG, Total Gate Charge [nC]
※
Note : I
= 1.1A
D
FQN1N60C Rev. A
3
www.fairchildsemi.com
FQN1N60C 600V N-Channel MOSFET
Typical Performance Characteristics
(Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
1.2
1.1
1.0
, (Normalized)
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-100 -50 0 50 100 150 200
Notes :
※
1. VGS = 0 V
2. I
= 250 µ A
D
TJ, Junct ion Temperatur e [oC]
3.0
2.5
2.0
1.5
, (Normalized)
1.0
DS(ON)
R
Drain-Source On-Resistance
0.5
0.0
-100 -50 0 50 100 150 200
TJ, Juncti on Temperature [oC]
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
10
, Drain Current [A]
D
I
10
Operation in This Area
is Limited by R
0
DS(on)
100 µs
1 ms
10 ms
100 ms
DC
Notes :
※
1. TC = 25 oC
2. T
= 150 oC
J
-1
0
10
10
3. Single Pulse
1
2
10
3
10
VDS, Drai n-Sour ce Volt age [V]
0.3
0.2
0.1
, Drain Current [A]
D
I
0.0
25 50 75 100 125 150
TC, Case Temperat ure [ ]
Notes :
※
1. VGS = 10 V
= 0.15 A
2. I
D
℃
Figure 11. Transient Thermal Response Curve
Notes :
※
1. Z
(t) = 50 /W Max.
θ JL
2. D uty Fa cto r, D=t1/t
3. TJM - TL = PDM * Z
-2
-1
10
0
10
1
10
4
FQN1N60C Rev. A
2
10
D=0.5
1
0.2
10
0.1
0.05
0.02
0
10
0.01
(t), Thermal Response
JL
θ
Z
-1
10
-5
10
-4
10
10
-3
single pulse
10
t1, Squ are W av e P u lse D u ra tion [sec ]
℃
2
(t)
θ JL
2
10
3
10
www.fairchildsemi.com
12V
12V
200nF
200nF
3mA
3mA
50KΩ
50KΩ
V
V
Gate Charge Tes t Circuit & Waveform
V
V
GS
GS
GS
300nF
300nF
Same Type
Same Type
as DUT
as DUT
DUT
DUT
V
V
DS
DS
GS
10V
10V
Resistive Switching Test Circuit & Waveforms
FQN1N60C 600V N-Channel MOSFET
Q
Q
g
g
Q
Q
gs
gs
Q
Q
gd
gd
Charge
Charge
10V
10V
10V
10V
R
R
L
DUT
DUT
L
V
V
DD
DD
V
V
DS
DS
V
V
GS
GS
R
R
G
G
V
V
DS
DS
90%
90%
10%
10%
V
V
GS
GS
t
t
d(on)tr
d(on)tr
t
t
on
on
t
t
d(off)
d(off)
t
t
f
f
t
t
off
off
Unclamped Inductive Switching Test Circuit & Waveforms
BV
BV
DSS
L
LL
V
V
DS
DS
BV
BV
DSS
V
V
DSS
I
I
AS
AS
DD
DD
I
IDI
D
D
R
R
G
G
DUT
DUT
t
t
p
p
V
V
DD
DD
1
1
1
1
----
----
----
----
E
E
=LI
E
=LI
=LI
AS
AS
AS
2
2
2
2
2
2
2
AS
AS
AS
I
I
(t)
(t)
D
D
t
t
p
p
DSS
--------------------
-------------------BV
BV
DSS-VDD
DSS-VDD
Time
Time
V
(t)
V
(t)
DS
DS
FQN1N60C Rev. A
5
www.fairchildsemi.com
Peak Diode Recovery dv /dt Test Circuit & Waveforms
+
DUT
DUT
I
I
SD
SD
Driver
Driver
R
R
G
G
V
V
GS
GS
+
V
V
DS
DS
_
_
L
LL
Same Type
Same Type
as DUT
as DUT
• dv/dt controlled by R
• dv/dt controlled by R
•ISDcontrolled by pulse period
•ISDcontrolled by pulse period
G
G
FQN1N60C 600V N-Channel MOSFET
V
V
DD
DD
V
V
GS
GS
( Driver )
( Driver )
I
I
SD
SD
( DUT )
( DUT )
V
V
DS
DS
( DUT )
( DUT )
Gate Pulse Width
Gate Pulse Width
Gate Pulse Width
--------------------------
--------------------------
--------------------------
D =
D =
D =
Gate Pulse Period
Gate Pulse Period
Gate Pulse Period
IFM, Body Diode Forward Current
IFM, Body Diode Forward Current
I
I
RM
RM
Body Diode Reverse Current
Body Diode Reverse Current
Body Diode Recovery dv/dt
Body Diode Recovery dv/dt
V
V
SD
SD
Body Diode
Body Diode
Forward Voltage Drop
Forward Voltage Drop
di/dt
di/dt
10V
10V
V
V
DD
DD
FQN1N60C Rev. A
6
www.fairchildsemi.com
Mechanical Dimensions
0.46
±0.10
4.58
+0.25
–0.15
FQN1N60C 600V N-Channel MOSFET
TO-92
±0.20
4.58
±0.40
14.47
1.27TYP
[1.27
±0.20
3.86MAX
±0.10
1.02
+0.10
–0.05
0.38
1.27TYP
]
3.60
±0.20
[1.27
±0.20
]
0.38
+0.10
–0.05
(0.25)
(R2.29)
FQN1N60C Rev. A
Dimensions in Millimeters
7
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systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
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PRODUCT STA TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or
In Design
First Production
Full Production
2. A critical component is any component of a life
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This datasheet contains the design specifications for
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Rev. I17
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