Fairchild FQN1N50C service manual
FQN1N50C
500V N-Channel MOSFET
FQN1N50C 500V N-Channel MOSFET
January 2006
®
QFET
Features
• 0.38 A, 500 V, R
• Low gate charge ( typical 4.9 nC )
• Low Crss ( typical 4.1 pF)
• Fast switching
• 100 % avalanche tested
• Improved dv/dt capability
= 6.0 Ω @ VGS = 10 V
DS(on)
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficiency switched mode power supplies, active power factor
correction, electronic lamp ballasts based on half bridge
topology.
D
G
TO-92
SDG
FQN Series
S
Absolute Maximum Ratings
Symbol Parameter FQN1N50C Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
P
D
TJ, T
STG
T
L
Drain-Source Voltage 500 V
Drain Current - Continuous (TC = 25°C) 0.38 A
- Continuous (TC = 100°C) 0.24 A
Drain Current - Pulsed (Note 1) 3.04 A
Gate-Source Voltage ± 30 V
Single Pulsed Avalanche Energy (Note 2) 44.4 mJ
Avalanche Current (Note 1) 0.38 A
Repetitive Avalanche Energy (Note 1) 0.21 mJ
Power Dissipation (TA = 25°C) 0.89 W
Power Dissipation (TL = 25°C) 2.08 W
- Derate above 25°C 0.017 W/°C
Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
300 °C
Thermal Characteristics
Symbol Parameter Typ Max Units
R
θJL
R
θJA
©2006 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com
FQN1N50C Rev. A
Thermal Resistance, Junction-to-Lead (Note 6a) -- 60 °C/W
Thermal Resistance, Junction-to-Ambient (Note 6b) -- 140 °C/W
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tap e Widt h Quantity
1N50C FQN1N50C TO-92 -- -- 2000ea
FQN1N50C 500V N-Channel MOSFET
Electrical Characteristics T
= 25°C unless otherwise noted
C
Symbol Parameter Test Conditions Min. Typ . Max. Units
Off Characteristics
BV
∆BV
∆T
I
DSS
DSS
DSS
J
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 500 -- -- V
/
Breakdown Voltage Temperature
ID = 250 µA, Referenced to 25°C -- 0.5 -- V/°C
Coefficient
Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V -- -- 50 µA
VDS = 400 V, TC = 125°C -- -- 250 µA
I
GSSF
I
GSSR
Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V
Static Drain-Source
VGS = 10 V, ID = 0.19 A -- 4.6 6.0 Ω
On-Resistance
Forward Transconductance VDS = 40 V, ID = 0.19A (Note 4) -- 0.6 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance VDS = 25 V, VGS = 0 V,
Output Capacitance -- 28 40 pF
f = 1.0 MHz
-- 150 195 pF
Reverse Transfer Capacitance -- 4.1 -- pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time VDD = 250 V, ID = 1.0 A,
Turn-On Rise Time -- 10 30 ns
RG = 25 Ω
-- 10 30 ns
Turn-Off Delay Time -- 20 50 ns
Turn-Off Fall Time -- 15 40 ns
Total Gate Charge VDS = 400 V, ID = 1.0 A,
Gate-Source Charge -- 0.66 -- nC
VGS = 10 V
Gate-Drain Charge -- 2.9 -- nC
(Note 4, 5)
-- 4.9 6.4 nC
(Note 4, 5)
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 80mH, IAS = 1.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 0.38A, di/dt ≤ 200A/µs, VDD ≤ BV
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
6. a) Reference point of the R
b) When mounted on 3”x4.5” FR-4 PCB without any pad copper in a still air environment
(R
JA
θ
Maximum Continuous Drain-Source Diode Forward Current -- -- 0.38 A
Maximum Pulsed Drain-Source Diode Forward Current -- -- 3.04 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.38 A -- -- 1.4 V
Reverse Recovery Time VGS = 0 V, IS = 1.0 A,
Reverse Recovery Charge
Starting TJ = 25°C
DSS,
is the drain lead
JL
θ
is the sum of the junction-to-case and case-to-ambient thermal resistance. R
dIF / dt = 100 A/µs (Note 4)
is determined by the user’s board design)
CA
θ
-- 188 -- ns
-- 0.55 -- µC
FQN1N50C Rev. A
2 www.fairchildsemi.com
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
FQN1N50C 500V N-Channel MOSFET
0
10
-1
10
, Drain Current [A]
D
I
-2
10
10
V
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
-1
GS
0
10
VDS, Drain-Source Voltage [V]
Notes :※
1. 250µ s Pulse Test
= 25℃
2. T
C
1
10
0
10
150oC
25oC
, Drain Current [A]
D
I
-1
10
246810
VGS, Gate-Source Voltage [V]
-55oC
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue
20
15
VGS = 10V
[Ω ],
10
DS(ON)
R
5
VGS = 20V
Drain-Source On-Resistance
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
ID, Drain Current [A]
Note : T※J = 25℃
0
10
, Reverse Drain Current [A]
DR
I
-1
10
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VSD, Source- Drain voltage [V]
150℃
25℃
Notes :※
1. VGS = 0V
2. 250µ s Pulse Tes t
Notes :※
1. VDS = 40V
2. 250µ s Pulse Test
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
400
300
200
Capacitances [pF]
100
0
10
FQN1N50C Rev. A
C
= Cgs + Cgd (Cds = shorted)
iss
= Cds + C
C
oss
gd
C
= C
rss
gd
C
oss
C
iss
C
rss
-1
0
10
* Note :
= 0 V
1. V
GS
2. f = 1 MHz
1
10
VDS, Drain-Source Voltage [V]
12
10
8
VDS = 100V
VDS = 250V
VDS = 400V
6
4
, Gate-Source Voltage [V]
2
GS
V
0
0123456
Note : I※D = 1A
QG, Total Gate Charge [nC]
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