Fairchild FQD3P50, FQU3P50 service manual
FQD3P50 / FQU3P50
500V P-Chann el MOSFET
January 2009
QFET
®
General Description
FQD3P50 / FQU3P50
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic lamp ballast based on complimentary
Features
• -2.1A, -500V, R
• Low gate charge ( typical 18 nC)
• Low Crss ( typical 9.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS Compliant
DS(on)
= 4.9Ω @V
GS
half bridge.
D
G
!!!!
!!!!
I-PAK
S
D-PAK
FQD Series
G
G
Absolute Maximum Ratings T
D
S
= 25°C unless otherwise noted
C
FQU Series
Symbol Parameter FQD3P50 / FQU3P50 Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt
P
D
Drain-Source Voltage -500 V
Drain Current
- Continuous (T
- Continuous (T
Drain Current - Pulsed
= 25°C)
C
= 100°C)
C
(Note 1)
-2.1 A
-1.33 A
-8.4 A
Gate-Source Voltage ± 30 V
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Power Dissipation (TA = 25°C) *
Power Dissipation (T
= 25°C)
C
(Note 2)
(Note 1)
(Note 1)
(Note 3)
250 mJ
-2.1 A
5.0 mJ
-4.5 V/ns
2.5 W
50 W
- Derate above 25°C 0.4 W/°C
, T
T
J
STG
T
L
Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
300 °C
= -10 V
S
!!!!
!!!!
●●●●
●●●●
●●●●
●●●●
▶▶▶▶
▶▶▶▶
▲▲▲▲
▲▲▲▲
●●●●
●●●●
!!!!
!!!!
D
Thermal Charac teristics
Symbol Parameter Typ Max Units
R
θJC
R
θJA
R
θJA
* When mounted on the minimum pad size recommended (PCB Mount)
©2009 Fairchild Semiconductor Internati Rev. A2, January 2009
Thermal Resistance, Junction-to-Case -- 2.5 °C/W
Thermal Resistance, Junction-to-Ambient * -- 50 °C/W
Thermal Resistance, Junction-to-Ambient -- 110 °C/W
FQD3P50 / FQU3P50
Elerical Characteristics T
= 25°C unless otherwise noted
C
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BV
DSS
/ ∆T
I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
J
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
V
= 0 V, I
GS
= -250 µA, Referenced to 25°C
I
D
V
= -500 V, VGS = 0 V
DS
= -400 V, TC = 125°C
V
DS
V
= -30 V, VDS = 0 V
GS
V
= 30 V, VDS = 0 V
GS
= -250 µA
D
-500 -- -- V
-- 0.42 -- V/°C
-- -- -1 µA
-- -- -10 µA
-- -- -100 nA
-- -- 100 nA
On Characteristics
V
R
g
FS
GS(th)
DS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
V
= VGS, I
DS
= -10 V, ID = -1.05 A
V
GS
V
= -50 V, ID = -1.05 A
DS
= -250 µA
D
(Note 4)
-3.0 -- -5.0 V
-- 3.9 4.9 Ω
-- 2.1 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance -- 70 90 pF
Reverse Transfer Capacitance -- 9.5 12 pF
V
= -25 V, VGS = 0 V,
DS
f = 1.0 MHz
-- 510 660 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time
Turn-On Rise Time -- 56 120 ns
Turn-Off Delay Time -- 35 80 ns
Turn-Off Fall Time -- 45 100 ns
Total Gate Charge
Gate-Source Charge -- 3.6 -- nC
Gate-Drain Charge -- 9.2 -- nC
V
= -250 V, ID = -2.7 A,
DD
R
= 25 Ω
G
V
= -400 V, ID = -2.7 A,
DS
V
GS
= -10 V
(Note 4, 5)
(Note 4, 5)
-- 12 35 ns
-- 18 23 nC
Drain-So urce Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 102mH, IAS = -2.1A, VDD = -50V, R
3. I
≤ -2.7A, di/dt ≤ 200A/µs, V
SD
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2009 Fairchild Semiconductor International
Maximum Continuous Drain-Source Diode Forward Current -- -- -2.1 A
Maximum Pulsed Drain-Source Diode Forward Current -- -- -8.4 A
V
Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge -- 1.5 -- µC
DD
≤ BV
G
= 25 Ω, Starting T
Starting TJ = 25°C
DSS,
= 25°C
J
= 0 V, IS = -2.1 A
GS
= 0 V, IS = -2.7 A,
V
GS
dI
/ dt = 100 A/µs
F
-- -- -5.0 V
-- 270 -- ns
(Note 4)
Rev. A2, January 2009
Typical Characteristics
V
GS
Top : -15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
0
10
-6.0 V
Bottom : -5.5 V
FQD3P50 / FQU3P50
-1
10
, Drai n Current [A]
D
-I
-2
10
-1
10
-VDS, Drain- Source Volt age [V]
0
※
Notes :
1. 250μs Pulse Test
℃
2. T
= 25
C
0
10
1
10
10
, Drai n Current [A]
D
-I
-1
10
246810
℃
150
℃
25
※
℃
-55
Notes :
1. V
= -50V
DS
2. 250μs Pulse Test
-VGS , Gate-Source Voltag e [V]
Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i st ics
8
7
6
],
Ω
[
5
DS(on)
R
VGS = - 20V
VGS = - 10V
4
Drain-Source On-Resistance
3
2
02468
※
Note : T
℃
= 25
J
-ID , Drain Current [A]
Figure 3. On-Resistance Variati on vs .
Drain Current and Gate Voltage
1200
1000
800
600
400
Capacitance [pF]
200
0
-1
10
VDS, Drain- Source Volt age [V]
C
= Cgs + Cgd (Cds = shorted)
iss
= Cds + C
C
oss
gd
C
= C
rss
gd
C
iss
C
oss
※
Notes :
1. V
= 0 V
10
1
GS
2. f = 1 MHz
C
rss
0
10
0
10
℃
150
℃
, Reverse Drain Current [A]
DR
-I
-1
10
0.0 0.5 1.0 1.5 2.0 2.5 3.0
25
※
Notes :
= 0V
1. V
GS
2. 250μs Pulse Test
-VSD , Source- Drain Volt age [V]
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
VDS = -100V
VDS = -250V
VDS = -400V
※
Note : I
= -2.7 A
D
12
10
8
6
4
, Gate- Source Vol tage [ V]
GS
2
-V
0
0 2 4 6 8 101214161820
QG, Total Gate Charge [nC]
Figure 5. Capacitance C haracteristics Figure 6. Gate Charge Characteristics
©2009 Fairchild Semiconductor International
Rev. A2, January 2009
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