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FQAF33N10L
FQAF33N10L
100V LOGIC N-Channel MOSFET
September 2000
QFET
QFET
QFETQFET
TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as high efficiency
switching DC/DC converters, and DC motor control.
G
SD
Absolute Maximum Ratings T
Symbol Parameter FQAF33N10L Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt
P
D
T
, T
J
STG
T
L
Drain-Source Voltage 100 V
Drain Current
Drain Current - Pulsed
Gate-Source Voltage ± 20 V
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Power Dissipation (TC = 25°C)
Operating and Storage Temperature Range -55 to +175 °C
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
- Continuous (T
- Continuous (T
- Derate above 25°C 0.56 W/°C
TO-3PF
FQAF Series
= 25°C unless otherwise noted
C
= 25°C)
C
= 100°C)
C
Features
• 25.8A, 100V, R
• Low gate charge ( typical 30 nC)
• Low Crss ( typical 70 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
= 0.052Ω @VGS = 10 V
DS(on)
D
!
!
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"
"
"
!
!
"
!
!
G
"
"
"
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S
25.8 A
18.2 A
103.2 A
430 mJ
25.8 A
8.3 mJ
6.0 V/ns
83 W
300 °C
Thermal Characteristics
Symbol Parameter Typ Max Units
R
θJC
R
θJA
©2000 Fairchild Semiconductor International
Thermal Resistance, Junction-to-Case -- 1.8 °C/W
Thermal Resistance, Junction-to-Ambient -- 40 °C/W
Rev. A, September 2000
FQAF33N10L
Electrical Characteristics T
= 25°C unless otherwise noted
C
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BV
DSS
/ ∆T
I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
J
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
= 0 V, ID = 250 µA
V
GS
I
= 250 µA, Referenced to 25°C
D
V
= 100 V, VGS = 0 V
DS
V
= 80 V, TC = 150°C
DS
V
= 20 V, VDS = 0 V
GS
= -20 V, VDS = 0 V
V
GS
100 -- -- V
-- 0.09 -- V/°C
-- -- 1 µA
-- -- 10 µA
-- -- 100 nA
-- -- -100 nA
On Characteristics
V
R
g
FS
GS(th)
DS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
V
= VGS, ID = 250 µA
DS
V
= 10 V, ID = 12.9 A
GS
= 5 V, ID = 12.9 A
V
GS
V
= 30 V, ID = 12.9 A
DS
(Note 4)
1.0 -- 2.0 V
0.039
--
0.043
0.052
0.055
-- 25 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance -- 305 400 pF
Reverse Transfer Capacitance -- 70 90 pF
= 25 V, VGS = 0 V,
V
DS
f = 1.0 MHz
-- 1250 163 0 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time
Turn-On Rise Time -- 470 950 ns
Turn-Off Delay Time -- 70 150 ns
Turn-Off Fall Time -- 120 25 0 n s
Total Gate Charge
Gate-Source Charge -- 4.7 -- nC
Gate-Drain Charge -- 16 -- nC
= 50 V, ID = 33 A,
V
DD
= 25 Ω
R
G
= 80 V, ID = 33 A,
V
DS
V
GS
= 5 V
(Note 4, 5)
(Note 4, 5)
-- 17 45 ns
-- 30 40 nC
Ω
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 0.97mH, IAS = 33A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 33A, di/dt ≤ 300A/µs, VDD ≤ BV
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Maximum Continuous Drain-Source Diode Forward Current -- -- 25.8 A
Maximum Pulsed Drain-Source Diode Forward Current -- -- 103.2 A
= 0 V, IS = 25.8 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge -- 0.26 -- µC
Starting TJ = 25°C
DSS,
V
GS
= 0 V, IS = 33 A,
V
GS
/ dt = 100 A/µs
dI
F
(Note 6)
(Note 4)
-- -- 1.5 V
-- 90 -- ns
Rev. A, September 2000
Typical Characteristics
FQAF33N10L
10
10
, Drain Current [A]
D
I
10
2
V
Top : 10.0 V
8.0 V
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V
Bottom : 3.0 V
1
0
-1
10
GS
※
Notes :
1. 250μs Pulse Test
℃
= 25
2. T
C
0
10
1
10
VDS, Drai n -Source Voltag e [V]
0.20
0.16
0.12
],
Ω
[
0.08
DS(ON)
R
0.04
Drain-Source On-Resistance
0.00
0306090120
VGS = 5V
VGS = 10V
※
Note : T
℃
= 25
J
ID, Dra i n Current [A]
2
10
1
10
℃
175
℃
25
0
10
, Drain Current [A]
D
I
-1
10
0246810
-55
℃
※
Notes :
1. V
= 30V
DS
2. 250μs Pulse Test
VGS, Gate-Source V oltage [V]
Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s
2
10
1
10
0
10
℃
175
, Reverse Drain Current [A]
DR
I
-1
10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
℃
25
VSD, Sou r c e-Drain voltage [V]
※
Notes :
= 0V
1. V
GS
2. 250μs Pulse Test
Figure 3. On-Resistance Variati on vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
VDS = 80V
VDS = 50V
※
Note : I
3600
3000
2400
1800
1200
Capacitance [pF]
600
0
-1
10
C
= Cgs + Cgd (Cds = shorted)
iss
= Cds + C
C
oss
gd
C
= C
rss
gd
※
10
1
Notes :
= 0 V
1. V
GS
2. f = 1 MHz
C
iss
C
oss
C
rss
0
10
VDS, Drain-Source Voltage [V]
12
10
8
6
4
, Gate-Source Voltage [V]
2
GS
V
0
01020304050
QG, Tota l Gate Charge [n C]
Figure 5. Capacitance C haracteristics Figure 6. Gate Charge Characteristics
D
= 33A
Rev. A, September 2000©2000 Fairchild Semiconductor International