3.3V LVTTL/LVCMOS Compatibility
Specifications guaranteed over 3V to 5.5V supply
■
voltage and -40°C to +110°C temperature range
■
Safety and regulatory approvals
– UL1577, 3750 VAC
– IEC60747-5-2 (pending approval)
RMS
for 1 min.
Applications
Microprocessor system interface
■
– SPI, I
Industrial fieldbus communications
■
– DeviceNet, CAN, RS485
■
Programmable logic control
Isolated data acquisition system
■
■
Voltage level translator
Isolating MOSFET/IGBT gate drivers
■
2
C
Description
The FODM8061 is a 3.3V/5V high-speed logic gate
output (open collector) optocoupler, which supports
isolated communications allowing digital signals to
communicate between systems without conducting
ground loops or hazardous voltages. It utilizes Fairchild’s
proprietary coplanar packaging technology, Optoplanar
and optimized IC design to achieve high noise immunity,
characterized by high common mode transient immunity
specifications.
This optocoupler consists of an AlGaAS LED at the
input, optically coupled to a high speed integrated photodetector logic gate. The output of the detector IC is an
open collector schottky-clamped transistor. The coupled
parameters are guaranteed over the wide temperature
range of -40°C to +110°C. A maximum input signal of
5mA will provide a minimum output sink current of 13mA
(fan out of 8).
Safety and Insulation Ratings for Mini-Flat Package (SO5 Pin)
As per IEC60747-5-2 (Pending Certification). This optocoupler is suitable for “safe electrical insulation” only within the
safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.
SymbolParameterMin.Typ.Max.Unit
Installation Classifications per DIN VDE 0110/1.89 Table 1
For rated main voltage < 150VrmsI-IV
For rated main voltage < 300VrmsI-III
Climatic Classification40/110/21
Pollution Degree (DIN VDE 0110/1.89)2
CTIComparative Tracking Index175
V
V
T
V
PR
V
PR
IORM
IOTM
Case
R
IO
Input to Output Test Voltage, Method b,
VIORM x 1.875 = V
t
= 1 sec, Partial Discharge < 5 pC
m
, 100% Production Test with
PR
Input to Output Test Voltage, Method a,
VIORM x 1.5 = V
t
= 60 sec, Partial Discharge < 5 pC
m
, Type and Sample Test with
PR
Max Working Insulation Voltage565V
Highest Allowable Over Voltage4000V
External Creepage5.0mm
External Clearance5.0mm
Insulation thickness0.5mm
Safety Limit Values, Maximum Values allowed in the event
of a failure, Case Temperature
Insulation Resistance at T
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In
addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
SymbolParameterValueUnits
T
T
T
V
PD
PD
STG
OPR
T
J
SOL
I
F
V
R
CC
V
O
I
O
I
O
Storage Temperature-40 to +125ºC
Operating Temperature-40 to +110ºC
Junction Temperature-40 to +125ºC
Lead Solder Temperature
260 for 10secºC
(Refer to Reflow Temperature Profile)
Forward Current50mA
Reverse Voltage5.0V
Supply Voltage0 to 7.0V
Output Voltage-0.5 to V
+0.5V
CC
Average Output Current50mA
Input Power Dissipation
Output Power Dissipation
(1)(2)
(1)(2)
100mW
85mW
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
SymbolParameterMin.Max.Unit
T
A
V
V
CC,
V
FL
I
FH
I
FL
NFan Out (at R
R
L
Isolation Characteristics
Ambient Operating Temperature-40+110ºC
DD
Supply Voltages
(3)
3.05.5V
Logic Low Input Voltage00.8V
Logic High Input Current
(4)
6.315mA
Logic Low Input Current250µA
= 1kΩ)5TTL Loads
L
Output Pull-up Resistor3304k
(T
=25ºC)
A
Ω
SymbolParameterTest ConditionsMin.Typ.Max.Units
V
R
C
Notes:
No derate required to 110ºC.
2.Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
3. 0.1µF bypass capacitor must be connected between pins 4 and 6.
4. Recommended I
5. Device is considered a two terminal device: Pins 1 and 3 are shorted, and Pins 4, 5, and 6 are shorted together.
6. 3,750 VAC
Input-Output Isolation Voltagefreq= 60Hz, t = 1.0min,
Logic HIGH Output CurrentIF = 250µA, VO = 3.3V, Fig. 48.050.0µA
OH
Logic LOW Output Supply CurrentIF = 10mA, V
Logic HIGH Output Supply CurrentIF = 0mA, V
= 10mA, Fig. 11.051.451.8V
F
= 10µA5.0V
R
= 0.6V, I
O
T
< 85ºC, Fig. 23.45.0mA
A
T
= 85ºC to 110 ºC4.27.5
A
I
(sinking) = 13mA, Fig.3
OL
I
= 250µA, VO = 5.0V, Fig. 42.130.0µA
F
I
= 10mA, V
F
I
= 0mA, V
F
(sinking) = 13mA,
OL
,
FHL
= 3.3V, Fig. 5, 76.08.5mA
CC
= 5.0V, Fig. 5, 77.510.0mA
CC
= 3.3V, Fig. 6, 74.07.0mA
CC
= 5.0V, Fig. 6, 76.09.0mA
CC
0.40.6V
Switching Characteristics
(T
= -40ºC to +110ºC, 3.0V ≤ V
A
Typical value is measured at T
(Apply over all recommended conditions)
5.5V, I
CC
= 25ºC and V
A
= 7.5mA), unless otherwise specified.
F
= 3.3V
CC
SymbolParameterTest ConditionsMin.Typ.Max.Units
Date RateRL = 350Ω10Mbps
t
PHL
t
PLH
PWDPulse Width Distortion,
t
PSK
t
R
t
F
|CM
|CM
Notes
7. t
PSK
from the same manufacturing date code that are operated at same case temperature (±5°C), at same operating
conditions, with equal loads (R
8. Common mode transient immunity at output high is the maximum tolerable positive dVcm/dt on the leading edge of
the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity
at output low is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal, Vcm, to
assure that the output will remain low.