Fairchild FOD050L, FOD053L, FOD250L service manual

FOD050L, FOD250L, FOD053L — LVTTL/LVCMOS 3.3V High Speed Transistor Optocouplers

July 2009

FOD050L, FOD250L: Single Channel FOD053L: Dual Channel LVTTL/LVCMOS 3.3V High Speed Transistor Optocouplers

Features

■

Low power consumption High speed

■

Available in single channel 8-pin DIP (FOD250L), 8-pin SOIC (FOD050L) or dual channel 8-pin SOIC (FOD053L)

■

Superior CMR – CM CM

= 35kV/µs (typical)

L

Guaranteed performance over temperature:

■

0°C to 70°C U.L. recognized (File # E90700)

■

VDE pending

= 50kV/µs (typical) and

H

Description

The FOD250L, FOD050L and FOD053L optocouplers consist of an AlGaAs LED optically coupled to a high speed photodetector transistor. These devices are speciﬁed for operation at a 3.3V supply voltage.

A separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional phototransistor optocouplers by reducing the basecollector capacitance of the input transistor.

An internal noise shield provides superior common mode rejection of CM

= 50kV/ms (typical) and CM

H

35kV/ms (typical).

Applications

■

Line receivers Pulse transformer replacement

■

High speed logic ground isolation: LVTTL/LVCMOS Wide bandwidth analog coupling

■

Schematics Package Outlines

=

L

1

N/C

+

2

V

F

_

3

4 5

V

8

CC

V

7

B

V

6

O

GNDN/C

+

1

V

F1

_

2

_

3

V

F2

+

4 5

8

7

6

V

CC

V

01

V

02

GND

8

1

8

1

8

1

Truth Table

LED

FOD050L, FOD250L

FOD053L

On Off

V

O

LOW

HIGH

(T

Absolute Maximum Ratings

= 25°C unless otherwise speciﬁed.)

A

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol Parameter Value Units

T

STG

T

OPR

T

SOL

EMITTER

I

(avg) DC/Average Forward Input Current Each Channel 25 mA

F

I

(pk) Peak Forward Input Current

F

(trans) Peak Transient Input Current

I

F

V P

DETECTOR

I

(avg) Average Output Current Each Channel 8 mA

O

(pk) Peak Output Current Each Channel 16 mA

I

O

V

EBR

V

CC

V

I

B

P

Storage Temperature -40 to +125 °C Operating Temperature -40 to +85 °C Lead Solder Temperature (Wave solder only) 260 for 10 sec °C

Each Channel 50 mA

(50% duty cycle, 1ms P.W.)

Each Channel 1.0 A

(≤1 µs P.W., 300pps) Reverse Input Voltage Each Channel 5 V

R

Input Power Dissipation

D

Each Channel 45 mW

(No derating required up to 85°C)

Emitter-Base Reverse Voltage FOD050L, FOD250L only 5 V Supply Voltage -0.5 to 7 V Output Voltage -0.5 to 7 V

O

Base Current FOD050L, FOD250L only 5 mA Output Power Dissipation

D

Each Channel 100 mW

(No derating required up to 85°C)

FOD050L, FOD250L, FOD053L — LVTTL/LVCMOS 3.3V High Speed Transistor Optocouplers

Electrical Characteristics

(T

= 0 to 70°C unless otherwise speciﬁed.)

A

Individual Component Characteristics

Symbol Parameter Test Conditions Device Min. Typ.* Max. Unit

EMITTER

V

B

DETECTOR

I

OH

I

CCL

I

CCH

**All Typicals at T

Input Forward Voltage I

F

Input Reverse

VR

Breakdown Voltage

Logic High Output Current

Logic Low Supply Current

Logic High Supply Current

= 25°C

A

= 16mA, T

F

= 16mA 1.8

I

F

I

= 10µA All 5.0 V

R

I

= 0mA, V

F

T

= 25°C

A

I

= 16mA, V

F

V

= 3.3V

CC

= I

I

F1

F2

V

= Open, V

O

I

= 0mA, V

F

V

= 3.3V, T

CC

= 0mA, V

I

F

V

= 3.3V

CC

=25°C All 1.45 1.7 V

A

= V

O

= Open,

O

= 3.3V,

CC

All 0.001 1 µA

FOD050L FOD250L

= 16mA,

CC

= Open,

O

= 25°C

A

= Open,

O

= 3.3V

FOD053L 400

FOD050L FOD250L

FOD053L 10

200 µA

0.3 µA

Transfer Characteristics

Symbol Parameter Test Conditions Device Min. Typ.** Max. Unit

COUPLED

CTR Current Transfer Ratio

V

Logic Low Output

OL

Voltage Output Voltage

*All Typicals at T

= 25°C

A

Note:

1. Current Transfer Ratio is deﬁned as a ratio of output collector current, I 100%.

(1)

I

= 16mA, V

F

V

= 3.3V, T

CC

I

= 16mA, I

F

V

= 3.3V, T

CC

= 0.4 V,

O

= 25°C

A

= 3mA,

O

= 25°C

A

All 15 50 %

All 0.3 V

, to the forward LED input current, I

O

, times

F

FOD050L, FOD250L, FOD053L — LVTTL/LVCMOS 3.3V High Speed Transistor Optocouplers

Electrical Characteristics

Switching Characteristics

(Continued) (T

(V

= 3.3V)

CC

= 0 to 70°C unless otherwise speciﬁed.)

A

Symbol Parameter Test Conditions Device Min. Typ.** Max. Unit

T

Propagation Delay

PHL

Time to Logic LOW

T

Propagation Delay

PLH

Time to Logic HIGH

|CM

| Common Mode

H

Tr ansient Immunity at Logic HIGH

| Common Mode

|CM

L

Tr ansient Immunity at Logic LOW

R

= 1.9k Ω , I

L

= 16mA

F

(Fig. 10)

R

= 1.9k Ω , I

L

= 16mA

F

(Fig. 10)

I

= 0mA, V

F

R

= 4.1k Ω , T

L

= 0mA, VCM = 1,000V

I

F

T

= 25°C, RL = 1.9kΩ

A

= 1,000V

CM

= 25°C

A

IF = 16mA, VCM = 1,000V R

= 4.1kΩ. TA = 25°C

L

(Fig. 11) I

= 16mA, VCM = 1,000 V

F

R

= 1.9kΩ

L

(2,4)

(Fig. 11)

(2)

25°C All 1.0 µs

(2)

25°C All 1.0 µs

P-P

(3,4)

P-P

(2,4)

(3,4)

P-P

,

(Fig. 11)

,

(Fig. 11)

,

P-P

All 5,000 50,000 V/µs

5,000 50,000 V/µs

All 5,000 35,000 V/µs

5,000 35,000 V/µs

2.0

Isolation Characteristics

Symbol Characteristics Test Conditions Device Min. Typ.** Max. Unit

I

V

Input-Output

I-O

Insulation Leakage Current

Withstand Insulation

ISO

Test Voltage

Relative humidity = 45%, T

= 25°C, t = 5s,

A

V

= 3000VDC

I-O

(5)

f = 60Hz, TA = 25°C, t = 1 min.

(5)

All 1.0 µA

FOD050L

2500 V

FOD053L FOD250L 5000

I-O

Resistance

R

V

= 500VDC

I-O

(5)

All 10

11

10

12

(input to output)

C

I-O

Capacitance

f = 1MHz

(5)

All 0.2 pF

(input to output)

*All Typicals at T

= 25°C

A

Notes:

2. The 1.9k Ω load represents 1 TTL unit load of 1.6mA and 5.6k Ω pull-up resistor.

3. The 4.1kΩ load represents 1 LSTTL unit load of 0.36mA and 6.1kΩ pull-up resistor.

4. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV

edge of the common mode pulse signal V (i.e., V dV logic low state (i.e., V

> 2.0V). Common mode transient immunity in logic low level is the maximum tolerable (negative)

O

/dt on the trailing edge of the common mode pulse signal, V

cm

< 0.8V).

O

, to assure that the output will remain in a logic high state

CM

, to assure that the output will remain in a

CM

/dt on the leading

cm

5. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are

shorted together.

RMS

Ω