Fairchild FDZ663P service manual

FDZ663P

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WL-CSP 0.8X0.8 Thin

P-Channel 1.5 V Specified PowerTrench® Thin

-20 V, -2.7 A, 134 mΩ

December 2011

WL-CSP MOSFET

FDZ663P P-Channel 1.5 V Specified PowerTrench

Features

 Max r  Max r  Max r  Max r  Occupies only 0.64 mm

area of 2 x 2 BGA

 Ultra-thin package: less than 0.4 mm height when mounted

to PCB

 RoHS Compliant

= 134 mΩ at VGS = -4.5 V, ID = -2 A

DS(on)

= 171 mΩ at VGS = -2.5 V, ID = -1.5 A

DS(on)

= 216 mΩ at VGS = -1.8 V, ID = -1 A

DS(on)

= 288 mΩ at VGS = -1.5 V, ID = -1 A

DS(on)

of PCB area. Less than 16% of the

General Description

Designed on Fairchild's advanced 1.5 V PowerTrench® process with state of the art "fine pitch" Thin WLCSP packaging process, the FDZ663P minimizes both PCB space and r advanced WLCSP MOSFET embodies a breakthrough in packaging technology which enables the device to combine excellent thermal transfer characteristics, ultra-low profile (0.4 mm) and small (0.8x0.8 mm low r

DS(on)

) packaging, low gate charge, and

DS(on)

. This

Applications

 Battery management  Load switch  Battery protection

Thin

WL-CSP MOSFET

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

, T

STG

Drain to Source Voltage -20 V Gate to Source Voltage ±8 V

-Continuous TA = 25 °C (Note 1a) -2.7

-Pulsed -10 Power Dissipation TA = 25 °C (Note 1a) 1.3 Power Dissipation T Operating and Storage Junction Temperature Range -55 to +150 °C

= 25 °C unless otherwise noted

= 25 °C (Note 1b) 0.4

Thermal Characteristics

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 93 Thermal Resistance, Junction to Ambient (Note 1b) 311

°C/W

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

EJ FDZ663P WL-CSP 0.8X0.8 Thin 7 ” 8 mm 5000 units

www.fairchildsemi.com

FDZ663P P-Channel 1.5 V Specified PowerTrench

Electrical Characteristics T

= 25 °C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

ΔBV ΔT

DSS

GSS

DSS

DSS J

Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V -20 V Breakdown Voltage Temperature

Coefficient Zero Gate Voltage Drain Current VDS = -16 V, V Gate to Source Leakage Current VGS = ±8 V, V

= -250 μA, referenced to 25 °C -14 mV/°C

= 0 V -1 μA

= 0 V ±60 nA

On Characteristics

GS(th)

ΔV ΔT

DS(on)

GS(th)

Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA -0.3 -0.7 -1.2 V Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

= -250 μA, referenced to 25 °C 2.4 mV/°C

= -4.5 V, ID = -2 A 103 134

= -2.5 V, ID = -1.5 A 122 171

= -1.8 V, ID = -1 A 149 216

= -1.5 V, ID = -1 A 186 288

= -4.5 V, ID = -2 A, TJ =125°C 137 198

Forward Transconductance VDD = -5 V, ID = -2 A 8 S

Dynamic Characteristics

iss

oss

rss

Input Capacitance Output Capacitance 62 85 pF Reverse Transfer Capacitance 53 80 pF

Switching Characteristics

d(on)

d(off)

Q Q Q

g gs gd

Turn-On Delay Time Rise Time 6.2 12 ns Turn-Off Delay Time 67 107 ns Fall Time 32 52 ns Total Gate Charge Gate to Source Charge 0.6 nC Gate to Drain “Miller” Charge 1.6 nC

= -10 V, VGS = 0 V,

f = 1 MHz

= -10 V, ID = -2.5 A,

= -4.5 V, R

= -4.5 V, VDD = -10 V,

= -2.5 A

GEN

= 6 Ω

394 525 pF

4.8 10 ns

5.9 8.2 nC

mΩ

Thin

WL-CSP MOSFET

Drain-Source Diode Characteristics

Notes:

1. R

is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. boa rd of FR-4 mate rial. R

θJA

the user's board design.

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

Source to Drain Diode Forward Voltage V Reverse Recovery Time Reverse Recovery Charge 10 18 nC

a. 93 °C/W when mounted on a 1 in2 pad of 2 oz copper.

= 0 V, IS = -1.4 A (Note 2) -0.8 -1.2 V

= -2.5 A, di/dt = 100 A/μs

θJC

30 48 ns

is guaranteed by design while R

b. 311 °C/W when mounted on a minimum pad of 2 oz copper.

θCA

www.fairchildsemi.com

is determined by

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