Fairchild FDY2000PZ service manual

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January 2006

FDY2000PZ

Dual P-Channel (– 2.5V) Specified PowerTrench



MOSFET

FDY2000PZ Dual P-Channel (– 2.5V) Specified PowerTrench

General Description

This Dual P-Channel MOSFET has been designed
using Fairchild Semiconductor’s advanced Power
Trench process to optimize the R

@ VGS = – 2.5v.

DS(ON)

Applications

• Li-Ion Battery Pack

Features

• – 350 mA, – 20 V R
R

• ESD protection diode (note 3)

• RoHS Compliant

= 1.2 Ω @ VGS = – 4.5 V

DS(ON)

= 1.6 Ω @ VGS = – 2.5 V

DS(ON)

Absolute Maximum Ratings

Symbol

V

Drain-Source Voltage – 20 V

DSS

V

Gate-Source Voltage

GSS

Drain Current – Continuous
– Pulsed – 1000
Power Dissipation (Steady State)

TJ, T

Operating and Storage Junction Temperature

STG

Range

Parameter Ratings Unit

TA=25oC unless otherwise noted

(Note 1a)

(Note 1a)
(Note 1b)

± 8

– 350 ID

625 PD
446

–55 to +150

s

V

mA

mW

°C

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MOSFET

Thermal Characteristics

R

θJA

R

θJA

Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

A FDY2000PZ 7 ’’ 8 mm 3000 units

2006 Fairchild Semiconductor Corporation
FDY2000PZ Rev A

(Note 1a)

(Note 1b)

200
280

°C/W

www.fairchildsemi.com

FDY2000PZ Dual P-Channel (– 2.5V) Specified PowerTrench

Electrical Characteristics

Symbol

Parameter Test Conditions Min Typ Max Units

TA = 25°C unless otherwise noted

Off Characteristics

BV

Drain–Source Breakdown

DSS

∆BV

DSS

∆TJ
I

Zero Gate Voltage Drain Current VDS = – 16 V, VGS = 0 V – 3

DSS

I

Gate–Body Leakage,

GSS

On Characteristics

V

GS(th)

∆V

GS(th)

∆TJ
R

DS(on)

Voltage
Breakdown Voltage Temperature
Coefficient

(Note 2)

Gate Threshold Voltage

Gate Threshold Voltage
Temperature Coefficient

Static Drain–Source

On–Resistance

VGS = 0 V, ID = – 250 µA

ID = – 250 µA, Referenced to 25°C

VGS = ± 8 V, VDS = 0 V

VDS = VGS, ID = – 250 µA
ID = 250 µA, Referenced to 25°C

VGS = – 4.5 V, ID = – 350 mA
VGS = – 2.5 V, ID = – 300 mA
VGS = – 1.8 V, ID = – 150 mA
VGS = – 4.5 V, ID = – 350 mA,

– 20

14

V

mV/°C

± 10 µA

– 0.65 –1.03 – 1.5 V

–3

0.5

0.8

1.3

0.7

mV/°C

1.2

1.6

2.7

1.6

TJ = 125°C

gFS Forward Transconductance VDS = – 5 V, ID = – 350 mA 1.04

S

Dynamic Characteristics

C

Input Capacitance 100

iss

C

Output Capacitance 30 pF

oss

C

Reverse Transfer Capacitance

rss

Switching Characteristics

t

Turn–On Delay Time 6 12 ns

d(on)

(Note 2)

tr Turn–On Rise Time 13 23 ns
t

Turn–Off Delay Time 8 16 ns

d(off)

tf Turn–Off Fall Time
Qg Total Gate Charge 1.0 1.4 nC
Qgs Gate–Source Charge 0.2 nC
Qgd Gate–Drain Charge

Drain–Source Diode Characteristics and Maximum Ratings

VSD Drain–Source Diode Forward

VDS = – 10 V, V
f = 1.0 MHz

VDD = – 10 V, ID = – 0.5 A,
VGS = – 4.5 V, R

VDS = – 10 V, ID = – 350 mA,
VGS = – 4.5 V

VGS = 0 V, IS = – 150 m A

= 0 V,

GS

= 6 Ω

GEN

(Note 2)

15 pF

1 2 ns

0.3 nC

– 0.8 – 1.2 V

Voltage

trr Diode Reverse Recovery Time 10 ns
Qrr Diode Reverse Recovery Charge

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

is guaranteed by design while R

θJC

θCA

IF = – 350 mA,
dIF/dt = 100 A/µs

is determined by the user's board design

1.5 nC

pF

µA

Ω

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MOSFET

a) 200°C/W when

mounted on a 1in2 pad
of 2 oz copper

FDY200PZ Rev A www.fairchildsemi.com

b) 280°C/W when mounted on a

minimum pad of 2 oz copper

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs,
Duty Cycle < 2.0%

3. The diode connected between the gate
and source serves only as protection
againts ESD. No gate overvoltage
rating is implied.