Fairchild FDT86106LZ service manual
FDT86106LZ
G
D
S
D
SOT-22 3
N-Channel PowerTrench® MOSFET
100 V, 3.2 A, 108 mΩ
FDT86106LZ N-Channel PowerTrench
December 2010
Features
Max r
Max r
High performance trench technology for extremely low r
High power and current handling capability in a widely used
surface mount package
HBM ESD protection level > 3 KV typical (Note 4)
100% UIL tested
RoHS Compliant
= 108 mΩ at VGS = 10 V, ID = 3.2 A
DS(on)
= 153 mΩ at VGS = 4.5 V, ID = 2.7 A
DS(on)
DS(on)
General Description
This N-Channel logic Level MOSFETs are produced using
Fairchild Semiconductor‘s advanced Power Trench
that has been special tailored to minimize the on-state resistance
and yet maintain superior switching performance. G-S zener
has been added to enhance ESD voltage level.
®
process
Application
DC - DC Conversion
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Thermal Characteristics
R
θJC
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
86106LZ FDT86106LZ SOT-223 13 ’’ 12 mm 2500 units
©2010 Fairchild Semiconductor Corporation
FDT86106LZ Rev.C
Drain to Source Voltage 100 V
Gate to Source Voltage ±20 V
Drain Current -Continuous 3.2
-Pulsed 12
Single Pulse Avalanche Energy (Note 3) 12 mJ
Power Dissipation TA = 25 °C (Note 1a) 2.2
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
Thermal Resistance, Junction to Case 12
Thermal Resistance, Junction to Ambient (Note 1a) 55
= 25 °C unless otherwise noted
C
= 25 °C (Note 1b) 1.0
A
1
A
W
°C/W
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FDT86106LZ N-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
ΔBV
DSS
ΔT
J
I
DSS
I
GSS
On Characteristics
V
GS(th)
ΔV
GS(th)
ΔT
J
r
DS(on)
g
FS
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 80 V, V
Gate to Source Leakage Current VGS = ±20 V, V
(Note 2)
I
= 250 μA, referenced to 25 °C 71 mV/°C
D
= 0 V 1 μA
GS
= 0 V ±10 μA
DS
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.0 1.5 2.2 V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 μA, referenced to 25 °C -5 mV/°C
D
= 10 V, ID = 3.2 A 80 108
V
GS
V
= 4.5 V, ID = 2.7 A 100 153
GS
V
= 10 V, ID = 3.2 A,
GS
T
= 125 °C
J
140 189
Forward Transconductance VDS = 10 V, ID = 3.2 A 8 S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 46 65 pF
Reverse Transfer Capacitance 3.1 5 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g
g
gs
gd
Turn-On Delay Time
Rise Time 1.3 10 ns
Turn-Off Delay Time 10 20 ns
Fall Time 1.5 10 ns
Total Gate Charge VGS = 0 V to 10 V
Total Gate Charge VGS = 0 V to 5 V 2.4 4 nC
Gate to Source Gate Charge 0.7 nC
Gate to Drain “Miller” Charge 0.9 nC
= 50 V, VGS = 0 V,
V
DS
f = 1 MHz
= 50 V, ID = 3.2 A,
V
DD
V
= 10 V, R
GS
GEN
= 6 Ω
V
DD
I
= 3.2 A
D
= 50 V,
234 315 pF
3.8 10 ns
4.3 7 nC
mΩ
®
MOSFET
Drain-Source Diode Characteristics
V
= 0 V, IS = 3.2 A (Note 2) 0.86 1.3
V
SD
t
rr
Q
rr
Notes:
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
1. R
θJA
R
θJC
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 21 34 nC
is guaranteed by design while R
is determined by the user’s board design.
θJA
a)
55 °C/W when mounted on a
2
1 in
pa d of 2 oz co ppe r
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting TJ = 25°C, L = 1 mH, IAS = 5 A, VDD = 90 V, VGS = 10 V.
4. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
FDT86106LZ Rev.C
GS
= 0 V, IS = 1 A (Note 2) 0.77 1.2
V
GS
= 3.2 A, di/dt = 100 A/μs
I
F
2
31 49 ns
118 °C/W when mounted on
b)
a minimum pad of 2 oz copper
V
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