Fairchild FDS8958B service manual

FDS8958B
Dual N & P-Channel PowerTrench® MOSFET
Q1-N-Channel: 30 V, 6.4 A, 26 m Q2-P-Channel: -30 V, -4.5 A, 51 m
FDS8958B Dual N & P-Channel PowerTrench
December 2008
Features
Q1: N-Channel
Max rMax r
Q2: P-Channel
Max rMax rHBM ESD protection level > 3.5 kV (Note 3)
RoHS Compliant
= 26 mΩ at VGS = 10 V, ID = 6.4 A
DS(on)
= 39 mΩ at VGS = 4.5 V, ID = 5.2 A
DS(on)
= 51 mΩ at VGS = -10 V, ID = -4.5 A
DS(on)
= 80 mΩ at VGS = -4.5 V, ID = -3.3 A
DS(on)
D2
D2
D1
D1
Pin 1
S1
G1
S2
G2
General Description
These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild Semiconductor's advanced PowerTrench tailored to minimize on-state resistance and yet maintain superior switching performance.
These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
®
process that has been especially
Application
DC-DC ConversionBLU and motor drive inverter
D2
D2
D1
D1
5
Q2
6
Q1Q2Q1Q2Q1
7
8
G2
4
S2
3
G1
2
S1
1
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Q1 Q2 Units
V
DS
V
GS
I
D
P
D
E
AS
, T
T
J
STG
Drain to Source Voltage 30 -30 V Gate to Source Voltage ±20 ±25 V Drain Current - Continuous TA = 25 °C 6.4 -4.5
- Pulsed 30 -30 Power Dissipation for Dual Operation 2.0
T Single Pulse Avalanche Energy (Note 4) 18 5 mJ Operating and Storage Junction Temperature Range -55 to +150 °C
= 25 °C unless otherwise noted
C
A A
= 25 °C (Note 1a) 1.6 = 25 °C (Note 1b) 0.9
A
WPower Dissipation for Single Operation T
Thermal Characteristics
R
θJC
R
θJA
Thermal Resistance, Junction to Case (Note 1) 40 Thermal Resistance, Junction to Ambient (Note 1a) 78
°C/W
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDS8958B FDS8958B SO-8 13 ” 12 mm 2500 units
©2008 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDS8958B Rev.B
FDS8958B Dual N & P-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Type Min Typ Max Units
Off Characteristics
BV
BVT
I
DSS
I
GSS
DSS
DSS J
Drain to Source Breakdown Voltage Breakdown Voltage Temperature
Coefficient Zero Gate Voltage Drain Current
Gate to Source Leakage Current
= 250 µA, VGS = 0 V
D
I
= -250 µA, VGS = 0 V
D
ID = 250 µA, referenced to 25 °C I
= -250 µA, referenced to 25 °C
D
V
= 24 V, V
DS
V
= -24 V, V
DS
V
= ±20 V, V
GS
V
= ±25 V, V
GS
GS
GS
DS DS
= 0 V = 0 V
= 0 V = 0 V
Q1Q230
-30
Q1 Q2
Q1 Q2
Q1 Q2
V
24
-21
-1
±100
±10nAµA
mV/°C
1
I
On Characteristics
V
V
GS(th)
VT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
= VDS, ID = 250 µA
GS
V
= VDS, ID = -250 µA
GS
ID = 250 µA, referenced to 25 °C I
= -250 µA, referenced to 25 °C
D
= 10 V, ID = 6.4 A
V
GS
V
= 4.5 V, ID = 5.2 A
GS
V
= 10 V, ID = 6.4A, TJ = 125 °C
GS
V
= -10 V, ID = -4.5 A
GS
V
= -4.5 V, ID = -3.3 A
GS
V
= -10 V , ID = -4.5 A, TJ = 125 °C
GS
V
= 5 V, ID = 6.4 A
DD
V
= -5 V, ID = -4.5 A
DD
Q1Q21.0
-1.0
Q1 Q2
Q1
Q2
Q1 Q2
2.0
-1.9
-6 5
21 29 31
38 60 53
20 10
3.0
-3.0 mV/°C
26 39 39
51 80 72
µA
V
m
S
®
MOSFET
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Q1
= 15 V, VGS = 0 V, f = 1 MHZ
V
DS
Q2
= -15 V, VGS = 0 V, f = 1 MHZ
V
DS
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
405 570
115
10080150
75
55
2.4
4.4
540 760
100 155
pF
pF
pF
Q1 V
= 15 V, ID = 6.4 A,
DD
V
= 10 V, R
GS
GEN
Q2
= -15 V, ID = -4.5 A,
V
DD
V
= -10 V, R
GS
V
= 10 V
GS
V
= -10 V
GS
V
= 4.5 V
GS
V
= -4.5 V
GS
= 6
= 6
GEN
Q1 VDD = 15 V, I
= 6.4 A
D
Q2
= -15 V,
V
DD
I
= -4.5 A
D
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
4.3
6.01012
2.0
6.01012 12
17
22 30
2.0
7.01014
8.31412 19
4.1
5.8
7.0
9.6
1.3
1.9
1.7
3.6
ns
ns
ns
ns
nC
nC
nC
nC
©2008 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDS8958B Rev.B
FDS8958B Dual N & P-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Type Min Typ Max Units
Drain-Source Diode Characteristics
0.8
-0.8
17 20
6 8
1.2
-1.2 30
36 12
16
is determined by
θCA
V
= 0 V, IS = 1.3 A (Note 2)
V
SD
t
rr
Q
rr
NOTES:
1. R
is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJA
the user's board design.
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
4. UIL condition: Starting TJ = 25 °C, L = 1 mH, I Starting TJ = 25 °C, L = 1 mH, I
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
a) 78 °C/W when mounted on a 1 in2 pad of 2 oz copper
= 6 A, VDD = 27 V, VGS = 10 V . (Q1)
AS
= -4 A, VDD = -27 V, VGS = -10 V. (Q2)
AS
GS
V
= 0 V, IS = -1.3 A (Note 2)Q1Q2
GS
Q1 I
= 6.4 A, di/dt = 100 A/µs
F
Q2 I
= -4.5 A, di/dt = 100 A/µs
F
Q1 Q2
Q1 Q2
is guaranteed by design while R
θJC
b) 135 °C/W when mounted on a minimun pad
V
ns
nC
®
MOSFET
©2008 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDS8958B Rev.B
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