Fairchild FDS6986S, FDS6986S Schematics
September 2002
FDS6986S
FDS6986S
Dual Notebook Power Supply N-Channel PowerTrench
General Description
The FDS6986S is designed to replace two single SO-8
MOSFETs and Schottky diode in synchronous DC:DC
power supplies that provide various peripheral voltages
for notebook computers and other battery powered
electronic devices. FDS6986S contains two unique
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency.
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode
using Fairchild’s monolithic SyncFET technology.
D
2
D
/
S
2
1
D
/
S1
D
D
1
D
D
1
D
G
SO-8
Pin 1
SO-8
S
1
S
2
S
G
2
G
S
1
S
/
D
2
Features
• Q2: Optimized to minimize conduction losses
Includes SyncFET Schottky body diode
7.9A, 30V R
R
• Q1: Optimized for low switching losses
Low gate charge (6.5 nC typical)
6.5A, 30V R
R
5
6
7
8
SyncFET™
= 20 mΩ @ VGS = 10V
DS(on)
= 28 mΩ @ VGS = 4.5V
DS(on)
= 29 mΩ @ VGS = 10V
DS(on)
= 38 mΩ @ VGS = 4.5V
DS(on)
Q2
Q1
4
3
2
1
Absolute Maximum Ratings T
= 25°C unless otherwise noted
A
Symbol Parameter Q2 Q1 Units
V
Drain-Source Voltage 30 30 V
DSS
V
Gate-Source Voltage
GSS
ID Drain Current - Continuous
- Pulsed 30 20
PD Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation
TJ, T
STG
Operating and Storage Junction Temperature Range -55 to +150
(Note 1a)
7.9 6.5 A
(Note 1a)
1.6
(Note 1b)
(Note 1c)
±20 ±16
1
0.9
V
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS6986S FDS6986S 13” 12mm 2500 units
2002 Fairchild Semiconductor Corporation
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
FDS6986S Rev C1(W)
FDS6986S
Electrical Characteristics T
Symbol
Parameter Test Conditions Type Min Typ Max Units
= 25°C unless otherwise noted
A
Off Characteristics
BV
Drain-Source Breakdown
DSS
Voltage
∆BV
∆T
I
DSS
Breakdown Voltage
DSS
Temperature Coefficient
J
Zero Gate Voltage Drain
VGS = 0 V, ID = 1 mA
V
= 0 V, ID = 250 uA
GS
= 1 mA, Referenced to 25°C
I
D
= 250 µA, Referenced to 25°C
I
D
VDS = 24 V, VGS = 0 V Q2
Current
I
Gat e-B ody Leakage, Forward VGS = 20 V, VDS = 0 V
GSSF
I
Gate-Body Leakage, Reverse VGS = –20 V, VDS = 0 V
GSSR
On Characteristics
V
Gate Threshold Voltage VDS = VGS, ID = 1 mA
GS(th)
∆V
∆TJ
R
DS(on)
Gate Threshold Voltage
GS(th)
Temperature Coefficient
Static Drain-Source
(Note 2)
On-Resistance
I
On-State Drain Current VGS = 10 V, VDS = 5 V Q2
D(on)
= 16 V, VDS = 0 V
V
GS
= –16 V, VDS = 0 V
V
GS
= VGS, ID = 250 µA
V
DS
ID = 1 mA, Referenced to 25°C
I
= 250 uA, Referenced to 25°C
D
VGS = 10 V, ID = 7.9 A
= 10 V, ID = 7.9 A, TJ = 125°C
V
GS
= 4.5 V, ID = 7 A
V
GS
V
= 10 V, ID = 6.5 A
GS
= 10 V, ID = 6.5 A, TJ = 125°C
V
GS
= 4.5 V, ID = 5.6 A
V
GS
gFS Forward Transconductance VDS = 5 V, ID = 7.9 A
= 5 V, ID = 6.5 A
V
DS
Dynamic Characteristics
C
Input Capacitance Q2
iss
C
Output Capacitance Q2
oss
C
Reverse Transfer Capacitance
rss
RG Gate Resistance VGS = 15mV, f = 1.0 MHz Q2
Switching Characteristics
t
Turn-On Delay Time
d(on)
(Note 2)
tr Turn-On Rise Time
t
Turn-Off Delay Time
d(off)
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
= 10 V, VGS = 0 V,
V
DS
f = 1.0 MHz
= 15 V, ID = 1 A,
V
DD
V
GS
= 10V, R
GEN
= 6 Ω
Q2:
V
= 15 V, ID = 7.9 A, VGS = 5 V
DS
Q1:
V
= 15 V, ID = 6.5 A, VGS = 5 V
DS
Q2
Q1
Q2
Q1
30
30
V
20
23
500
Q1
Q2
100 NA
1
Q1
Q2
–100 nA
Q1
Q2
Q1 1 1
2.4
1.6 3 3
Q2 –6
Q1 –4
Q2 16
Q1 25
30
Q1
20
Q2
23
Q1
1233
Q1
695
344
Q1
Q2
117
106
Q1
1.4
Q1
Q2
8 7 16
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
5
4.5
25
20
11
2.5
11
6.5
5
2.5
4
1.3
20
24
32
23
28
29
37
49
30
38
A
S
22
pF
pF
pF
58
1.7
14
10 9 ns
40
36
20 5 ns
16 9 nC
nC
nC
mV/°C
µA
V
mV/°C
mΩ
Ω
ns
ns
FDS6986S Rev C1 (W)
Electrical Characteristics
Symbol
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current Q2
Parameter
(continued)
T
Test Conditions
= 25°C unless otherwise noted
A
Type
Min
Typ Max Units
3.0
Q1
tRR Reverse Recovery Time
QRR Reverse Recovery Charge
VSD Drain-Source Diode Forward
Voltage
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. See “SyncFET Schottky body diode characteristics” below.
is guaranteed by design while R
θJC
a) 78°C/W when
mounted on a
0.5in
oz copper
= 10 A,
I
F
= 300 A/µs
d
iF/dt
VGS = 0 V, IS = 3.5 A
VGS = 0 V, IS = 1.3 A
is determined by the user's board design.
θCA
2
pad of 2
(Note 3)
(Note 2)
(Note 2)
b) 125°C/W when
mounted on a
2
0.02 in
pad of
2 oz copper
Q2
Q2
Q1
17
12.5 nC
0.5
0.74
c) 135°C/W when
mounted on a
minimum pad.
1.3
ns
A
0.7
1.2
V
FDS6986S Rev C1 (W)
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