Fairchild FDS6680A service manual
November 2004
FDS6680A
Single N-Channel, Logic Level, PowerTrench® MOSFET
FDS6680A
General Description
This N-Channel Logic Level MOSFET is produced
using Fairchild Semiconductor’s advanced Power
Trench process that has been especially tailored to
minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
D
D
D
D
D
D
D
D
SO-8
Pin 1
SO-8
S
Absolute Maximum Ratings T
G
G
S
S
S
S
S
o
=25
C unless otherwise noted
A
Features
• 12.5 A, 30 V R
R
• Ultra-low gate charge
• High performance trench technology for extremely
DS(ON)
5
6
7
8
low R
• High power and current handling capability
= 9.5 mΩ @ VGS = 10 V
DS(ON)
= 13 mΩ @ VGS = 4.5 V
DS(ON)
4
3
2
1
Symbol Parameter Ratings Units
V
Drain-Source Voltage 30 V
DSS
V
Gate-Source Voltage
GSS
ID Drain Current – Continuous (Note 1a) 12.5 A
– Pulsed 50
PD
TJ, T
STG
Power Dissipation for Single Operation (Note 1a) 2.5
(Note 1b)
Operating and Storage Junction Temperature Range –55 to +150
(Note 1c)
±20
1.2
1.0
W
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
(Note 1a) 50
(Note 1) 25
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS6680A FDS6680A 13’’ 12mm 2500 units
©2004 Fairchild Semiconductor Corporation
°C/W
FDS6680A Rev F1(W)
FDS6680A
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
∆BVDSS
∆T
J
I
Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1
DSS
Breakdown Voltage Temperature
Coefficient
I
Gate–Body Leakage
GSS
= 0 V, ID = 250 µA
V
GS
= 250 µA, Referenced to 25°C
I
D
= 24 V, VGS = 0 V, TJ=55°C
V
DS
= ±20 V, VDS = 0 V
V
GS
30 V
25
mV/°C
µA
10
±100
µA
nA
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
∆VGS(th)
∆TJ
R
DS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
I
On–State Drain Current VGS = 10 V, VDS = 5 V 25 A
D(on)
= VGS, ID = 250 µA
V
DS
= 250 µA, Referenced to 25°C
I
D
VGS = 10 V, ID = 12.5 A
= 4.5 V, ID = 10.5 A
V
GS
= 10 V, ID = 12.5 A, TJ=125°C
V
GS
gFS Forward Transconductance VDS = 15 V, ID = 12.5 A 64 S
1 2 3 V
–4.9
7.8
9.9
11.0
9.5
13
15
mV/°C
mΩ
Dynamic Characteristics
C
Input Capacitance 1620 pF
iss
C
Output Capacitance 380 pF
oss
C
Reverse Transfer Capacitance
rss
RG Gate Resistance VGS = 15 mV, f = 1.0 MHz 1.3
V
= 15 V, V
DS
f = 1.0 MHz
= 0 V,
GS
160 pF
Ω
Switching Characteristics (Note 2)
t
Turn–On Delay Time 10 19 ns
d(on)
tr Turn–On Rise Time 5 10 ns
t
Turn–Off Delay Time 27 43 ns
d(off)
tf Turn–Off Fall Time
Qg Total Gate Charge 16 23 nC
Qgs Gate–Source Charge 5 nC
Qgd Gate–Drain Charge
V
= 15 V, ID = 1 A,
DD
= 10 V, R
V
GS
= 15 V, ID = 12.5 A,
V
DS
= 5 V
V
GS
GEN
= 6 Ω
15 27 ns
5.8 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current 2.1 A
VSD
trr Diode Reverse Recovery Time IF = 12.5 A, diF/dt = 100 A/µs 28 ns
Qrr Diode Reverse Recovery Charge 18 nC
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Drain–Source Diode Forward
Voltage
is guaranteed by design while R
θJC
θCA
= 0 V, IS = 2.1 A (Note 2) 0.73 1.2 V
V
GS
is determined by the user's board design.
a) 50°C/W when
mounted on a 1in2
pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
b) 105°C/W when
mounted on a .04 in
pad of 2 oz copper
2
c) 125°C/W when mounted
on a minimum pad.
FDS6680A Rev F1(W)
Loading...