Fairchild FDS4410 service manual
April 1998
FDS4410
Single N-Channel Logic Level PWM Optimized PowerTrenchTM MOSFET
General Description Features
This N-Channel Logic Level MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers.
The MOSFET features faster switching and lower gate
charge than other MOSFETs with comparable R
specifications.
DS(ON)
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power supply
designs with higher overall efficiency.
10 A, 30 V. R
R
= 0.0135 Ω @ VGS = 10 V
DS(ON)
= 0.0200 Ω @ VGS = 4.5 V.
DS(ON)
Optimized for use in switching DC/DC converters
with PWM controllers.
Very fast switching .
Low gate charge (typical 22 nC).
SOT-23
SuperSOTTM-8
D
D
D
D
FDS
SO-8 SOT-223SuperSOTTM-6
5
6
SOIC-16
4
3
4410
G
7
S
1
SO-8
pin
S
8
S
Absolute Maximum Ratings T
Symbol Parameter FDS4410 Units
V
DSS
V
GSS
I
D
P
D
TJ,T
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
Drain-Source Voltage 30 V
Gate-Source Voltage ±20 V
Drain Current - Continuous (Note 1a) 10 A
- Pulsed 50
Power Dissipation for Single Operation (Note 1a) 2.5 W
(Note 1b) 1.2
(Note 1c) 1
Operating and Storage Temperature Range -55 to 150 °C
STG
Thermal Resistance, Junction-to-Ambient (Note 1a) 50 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 25 °C/W
= 25oC unless other wise noted
A
2
1
© 1998 Fairchild Semiconductor Corporation
FDS4410 Rev.B1
Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
∆BV
I
DSS
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, I D = 250 µA 30 V
Breakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC 21 mV /oC
/∆T
J
Zero Gate Voltage Drain Current VDS = 24 V, V
= 0 V 1 µA
GS
TJ = 55°C 10 µA
I
I
GSSF
GSSR
Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA
ON CHARACTERISTICS (Note 2)
V
∆V
R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage VDS = VGS, ID = 250 µA 1 2 3 V
Gate Threshold Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC -4.5 mV /oC
/∆T
J
Static Drain-Source On-Resistance VGS = 10 V, I D = 10 A 0.011 0.0135
TJ =125°C 0.018 0.023
VGS = 4.5 V, I D = 9 A 0.017 0.02
I
g
D(ON)
FS
On-State Drain Current VGS = 10 V, VDS = 5 V 50 A
Forward Transconductance VDS = 10 V, I D= 10 A 27 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = 15 V, VGS = 0 V,
Output Capacitance 340 pF
f = 1.0 MHz
1340 pF
Reverse Transfer Capacitance 125 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
g
gs
gd
Turn - On Delay Time VDS= 15 V, I D= 1 A 12 22 ns
Turn - On Rise Time
VGS = 10 V , R
GEN
= 6 Ω
13 24 ns
Turn - Off Delay Time 38 60 ns
Turn - Off Fall Time 10 18 ns
Total Gate Charge VDS = 15 V, I D = 10 A, 22 31 nC
Gate-Source Charge VGS = 10 V 5 nC
Gate-Drain Charge 4 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
guaranteed by design while R
Maximum Continuous Drain-Source Diode Forward Current 2.1 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.1 A
is determined by the user's board design.
CA
θ
(Note 2) 0.73 1.2 V
Ω
is
JC
θ
a. 50OC/W on a 1 in2 pad
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
of 2oz copper.
b. 105OC/W on a 0.04 in
pad of 2oz copper.
2
c. 125OC/W on a 0.006 in2 pad
of 2oz copper.
FDS4410 Rev.B1
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