Fairchild FDN340P service manual

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September 200

2007 Fairchild Sem iconduct or Corpo ration FDN340P Rev E1

FDN340P

Single P-Channel, Logic Level, PowerTrench



MOSFET

General Description

This P-Channel Logic Level MOSFET is produced
using Fairchild Semiconductor advanced Power Trench
process that has been especially tailored to minimize
the on-state resistance and yet maintain low gate
charge for superior switching performance.

These devices are well suited for portable electronics
applications:load switching and power management,
battery charging circuits, and DC/DC conversion.

Features

• –2A, 20 V R

DS(ON)

= 70 mΩ @ VGS = –4.5 V

R

DS(ON)

= 110 mΩ @ VGS = –2.5 V

• Low gate charge (7.2 nC typical).

• High performance trench technology for extremely

low R

DS(ON)

.

• High power version of industry Standard SOT-23
package. Identical pin-out to SOT-23 with 30%
higher power handling capability.

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D

SG

Absolute Maxim um Ratings T

A

=25oC unless otherwise noted

Sym bol Param eter Ratings Units

V

DSS

Drain-Source Voltage –20 V

V

GSS

Gate-Source Voltage ±8 V

I

D

Drain Current – Continuous (Note 1a) –2 A

– Pulsed –10

Power Dissipation for Single Operation (Note 1a) 0.5P

D

(Note 1b)

0.46

W

TJ, T

ST G

Operating and Storage Junction Temperature Range –55 to +150 °C

Therm al Characteristics

R

θJA

Thermal Resistance, Junction-to-Ambient (Note 1a) 250

°C/W

R

θJ C

Thermal Resistance, Junction-to-Case (Note 1) 75

°C/W

Package Marking and Ordering Inform ation

Device Marking Device Reel Size Tape width Quantity

340 FDN340P 7’’ 8mm 3000 units

FDN340P

February 2007

FDN340P Rev E1

Electrical Characteristics T

A

= 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

DSS

Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA –20 V

∆BVD SS
∆T

J

Breakdown Voltage Temperature
Coefficient

ID = –250 µA,Referenced to 25°C –12 mV/°C

VDS = –16 V, VGS = 0 V –1 µA

I

DSS

Zero Gate Voltage Drain Current

VDS = –16 V, VGS = 0 V,TJ=55°C –10

I

GSSF

Gate–Body Leakage, Forward VGS= 8 V, VDS = 0 V 100 nA

I

GSSR

Gate–Body Leakage, Reverse VGS = –8 V, VDS = 0 V –100 nA

On Characteristics (Note 2)

V

GS(th)

Gate Threshold Voltage VDS = VGS, ID = –250 µA –0.4 –0.8 –1.5 V

∆VGS(th)
∆T

J

Gate Threshold Voltage
Temperature Coefficient

ID = –250 µA,Referenced to 25°C

3 mV/°C

VGS = –4.5 V, ID = –2 A 60 70

mΩ

VGS = –4.5 V, ID = –2 A,TJ=125°C

77 120

R

DS(on)

Static Drain–Source
On–Resistance

VGS= –2.5 V, ID = –1.7A,

82 110

I

D(on)

On–State Drain Current VGS = –4.5 V, VDS = –5 V –5 A

g

FS

Forward Transconductance VDS = –4.5 V, ID = –2 A 9 S

Dynamic Characteristics

600 Input Capacitance 779 pF

175 Output Capacitance 121 pF

80 Reverse Transfer Capacitance

VDS = –10 V, V

GS

= 0 V,

f = 1.0 MHz

56 pF

Switching Characteristics (Note 2)

t

d(on)

Turn–On Delay Time 10 20 ns

t

r

Turn–On Rise Time 9 10 ns

t

d(off)

Turn–Off Delay Time 27 43 ns

t

f

Turn–Off Fall Time

VDD = –10 V, ID = –1 A,
VGS = –4.5 V, R

GEN

= 6 Ω

11 20 ns

Q

g

Total Gate Charge 7.2 10 nC

Q

gs

Gate–Source Charge 1.7 nC

Q

gd

Gate–Drain Charge

VDS = –10V, ID = –3.5 A,
VGS = –4.5 V

1.5 nC

Drain–Source Diode Characteristics and Maximum Ratings

I

S

Maximum Continuous Drain–Source Diode Forward Current –0.42 A

V

SD

Drain–Source Diode Forward
Voltage

VGS = 0 V, IS = –0.42 A (Note 2) –0.7 –1.2 V

Notes:

1. R

θJA

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

the drain pins. R

θJC

is guaranteed by design while R

θCA

is determined by the user's board design.

a. 250°C/W when mounted on a

0.02in2 pad of 2 oz copper

b. 270°C/W when mounted on a
.001 in2 pad of 2 oz copper

Scale 1 : 1 on letter size paper

2.Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

FDN340P