Fairchild FDN336P service manual

FDN336P
Single P-Channel 2.5V Specified PowerTrench® MOSFET
FDN336P
January 2005
This P-Channel 2.5V specified MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance.
These devices are well suited for portable electronics applications: load switching and power management, battery charging circuits and DC/DC conversion.
D
Features
–1.3 A, –20 V. R R
Low gate charge (3.6 nC typical)
High performance trench technology for extremely
low R
SuperSOT
higher power handling capability than SOT23 in the same footprint
DS(ON)
TM
-3 provides low R
= 0.20 @ VGS = –4.5 V
DS(ON)
= 0.27 @ VGS = –2.5 V
DS(ON)
DS(ON)
D
and 30%
S
G
SuperSOT -3
TM
Absolute Maximum Ratings T
G
o
=25
C unless otherwise noted
A
Symbol Parameter Ratings Units
V
Drain-Source Voltage –20 V
DSS
V
Gate-Source Voltage
GSS
ID Drain Current – Continuous (Note 1a)Pulsed –10
Maximum Power Dissipation (Note 1a) 0.5 PD
TJ, T
Operating and Storage Junction Temperature Range –55 to +150
STG
(Note 1b)
±8
1.3
0.46
S
V A
W
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) 250
(Note 1) 75
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
336 FDN336P 7’’ 8mm 3000 units
©2005 Fairchild Semiconductor Corporation
°C/W °C/W
FDN306P Rev D
Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS
BV
BV
I
DSS
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V Breakdown Voltage Temp. Coefficient
/T
J
Zero Gate Voltage Drain Current
ID = -250 µA, Referenced to 25 oC VDS = -16 V, V
GS
= 0 V
-1 µA
TJ = 55°C
I
GSSF
I
GSSR
Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA Gate - Body Leakage, Reverse
VGS = -8 V, V
DS
= 0 V
ON CHARACTERISTICS (Note 2)
V
V
R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.4 -0.9 -1.5 V Gate Threshold Voltage Temp. Coefficient
/T
J
Static Drain-Source On-Resistance
ID = -250 µA, Referenced to 25 oC VGS = -4.5 V, ID = -1.3 A
TJ =125°C 0.18 0.32
VGS = -2.5 V, I D = -1.1 A I g
D(ON)
FS
On-State Drain Current VGS = -4.5 V, VDS = -5 V -5 A Forward Transconductance
VDS = -4.5 V, ID = -2 A
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = -10 V, VGS = 0 V, Output Capacitance 80 pF
f = 1.0 MHz
Reverse Transfer Capacitance 35 pF
SWITCHING CHARACTERISTICS (Note 2)
t t t t Q Q Q
D(on)
r
D(off)
f
g
gs
gd
Turn - On Delay Time Turn - On Rise Time 12 22 ns
VDD = -5 V, ID = -0.5 A,
VGS = -4.5 V, R
GEN
= 6
Turn - Off Delay Time 16 26 ns Turn - Off Fall Time 5 12 ns Total Gate Charge Gate-Source Charge 0.8 nC
VDS = -10 V, ID = - 2 A,
VGS = -4.5 V
Gate-Drain Charge 0.7 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Note:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
design while R
Maximum Continuous Drain-Source Diode Forward Current -0.42 A Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.42 A
is determined by the user's board design.
CA
θ
(Note) -0.7 -1.2 V
-16
mV /o C
-10 µA
-100 nA
3
mV /oC
0.122 0.2
0.19 0.27
4 S
330 pF
7 15 ns
3.6 5 nC
is guaranteed by
JC
θ
o
a. 250
C/W when mounted on
a 0.02 in2 pad of 2oz Cu.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
o
b. 270
C/W when mounted on
2
a 0.001 in
pad of 2oz Cu.
FDN336P Rev.D
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