tm
FDMS9600S
Dual N-Channel PowerTrench® MOSFET
Q1: 30V, 32A, 8.5mΩ Q2: 30V, 30A, 5.5mΩ
Features
Q1: N-Channel
Max r
Max r
Q2: N-Channel
Max r
Max r
Low Qg high side MOSFET
Low r
Thermally efficient dual Power 56 package
Pinout optimized for simple PCB design
RoHS Compliant
= 8.5mΩ at VGS = 10V, ID = 12A
DS(on)
= 12.4mΩ at VGS = 4.5V, ID = 10A
DS(on)
= 5.5mΩ at VGS = 10V, ID = 16A
DS(on)
= 7.0mΩ at VGS = 4.5V, ID = 14A
DS(on)
low side MOSFET
DS(on)
General Description
This device includes two specialized MOSFETs in a unique dual
Power 56 package. It is designed to provide an optimal
Synchronous Buck power stage in terms of efficiency and PCB
utilization. The low switching loss "High Side" MOSFET is com-
plemented by a Low Conduction Loss "Low Side" SyncFET.
Applications
Synchronous Buck Converter for:
Notebook System Power
General Purpose Point of Load
FDMS9600S Dual N-Channel PowerTrench
September 2008
®
MOSFET
G1
G2
G2
S2
S2
S2
S2
S2
S2
Power 56
MOSFET Maximum Ratings T
Symbol Parameter Q1 Q2 Units
V
DS
V
GS
I
D
P
D
, T
T
J
STG
Drain to Source Voltage 30 30 V
Gate to Source Voltage ±20 ±20 V
Drain Current -Continuous (Package limited) TC = 25°C 32 30
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 60 60
Power Dissipation for Single Operation (Note 1a) 2.5
(Note 1b) 1.0
Operating and Storage Junction Temperature Range -55 to +150 °C
G1
D1
D1
D1
D1
D1
D1
S1/D2
S1/D2
= 25°C unless otherwise noted
A
D1
D1
= 25°C 55 108
C
= 25°C (Note 1a) 12 16
A
Q2
5
6
7
8
4
3
2
1
Q 1
Thermal Characteristics
R
θJA
θJA
R
θJC
Thermal Resistance, Junction to Ambient (Note 1a) 50
Thermal Resistance, Junction to Ambient (Note 1b) 120
Thermal Resistance, Junction to Case 3 1.2
Package Marking and Ordering Information
A
W
°C/WR
Device Marking Device Package Reel Size Tape Width Quantity
FDMS9600S FDMS9600S Power 56 13” 12mm 3000 units
©2008 Fairchild Semiconductor Corporation
FDMS96
00S Rev.D
1
1
www.fairchi
ldsemi.com
FDMS9600S Dual N-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Typ e Min Typ Max Units
Off Characteristics
BV
∆BV
∆T
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 24V, V
Gate to Source Leakage Current VGS = ±20V, VDS= 0V
On Characteristics
V
GS(th)
∆V
∆T
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Drain to Source On Resistance
Forward Transconductance
= 250µA, VGS = 0V
I
D
= 1mA, VGS = 0V
I
D
ID = 250µA, referenced to 25°C
I
= 1mA, referenced to 25°C
D
= 0V
GS
V
= VDS, ID = 250µA
GS
= VDS, ID = 1mA
V
GS
ID = 250µA, referenced to 25°C
= 1mA, referenced to 25°C
I
D
V
= 10V, ID = 12A
GS
V
= 4.5V, ID = 10A
GS
= 10V, ID = 12A , TJ = 125°C
V
GS
= 10V, ID = 16A
V
GS
= 4.5V, ID = 14A
V
GS
= 10V, ID = 16A , TJ = 125°C
V
GS
= 10V, ID = 12A
V
DD
V
= 10V, ID = 16A
DD
Q1Q230
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
30
1
1
V
35
29
mV/°C
1
500
±100
±100nAnA
1.5
1.8
-4.5
-6.0
7.0
9.2
8.6
4.5
5.3
5.4
3
3
mV/°
8.5
12.4
13.0
5.5
7.0
8.3
54
68
µA
V
mΩ
S
C
®
MOSFET
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance f = 1MHz
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
= 15V, VGS = 0V, f= 1MHz
DS
= 10V, ID = 1A,
V
DD
V
GS
= 10V, R
GEN
= 6Ω
Q1
V
DD
= 15V, V
= 4.5V, ID = 12A
GS
Q2
V
DD
= 15V, V
= 4.5V, ID = 16A
GS
Q1
Q2
Q1
Q2
1280
2300
525
1545
Q1
Q2 80250
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
1.0
1.7
13
17
11
42
54
12
32
Q1
Q2
Q1
Q2
Q1
Q2
21
2.7
6.5
1705
3060
700
2055
120
375
pF
pF
pF
Ω
23
31
6
12
20
67
86
22
51
9
13
29
3
8
ns
ns
ns
ns
nC
nC
nC
FDMS9600S Rev.D1
2
www.fairchildsemi.com
FDMS9600S Dual N-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Type Min Typ Max Units
Drain-Source Diode Characteristics
I
S
V
SD
t
rr
Q
rr
Notes:
1: R
θJA
the user's board design.
Maximum Continuous Drain-Source Diode Forward Current
= 0V, IS = 2.1A (Note 2)
V
GS
V
= 0V, IS = 3.5A
Source to Drain Diode
Forward Voltage
VGS = 0V, IS = 8.2A (Note 2) Q2 0.5 1.0
Reverse Recovery Time
Reverse Recovery Charge
is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
a.50°C/W when mounted on
a 1 in2 pad of 2 oz copper
GS
Q1
= 12A, di/dt = 100A/µs
I
F
Q2
= 16A, di/dt = 300A/µs
I
F
(Note 2)
Q1
Q2
Q1
Q2
0.7
0.4
Q1
Q2
Q1
Q2
is guaranteed by design while R
θJC
b. 120°C/W when mounted on a
minimum pad of 2 oz copper
33
27
20
33
2.1
3.5
1.2
1.0
is determined by
θCA
A
V
ns
nC
®
MOSFET
2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
FDMS9600S Rev.D1
3
www.fairchildsemi.com
FDMS9600S Dual N-Channel PowerTrench
Typical Characteristics (Q1 N-Channel)T
60
VGS = 10V
50
40
30
20
, DRAIN CURRENT (A)
D
10
I
0
0.0 0.5 1.0 1.5 2.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1.
On-Region Characteristics Figure 2.
1.6
ID = 12A
1.5
=10V
V
GS
1.4
1.3
1.2
1.1
1.0
NORMALIZED
0.9
0.8
0.7
DRAIN TO SOURCE ON-RESISTANCE
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
F i g u r e 3 . N o r m a l i z e d O n - R e s i s t a n c e
vs Junction Temperature
PULSE DURATION = 300µs
DUTY CYCLE = 2.0%MAX
VGS = 3.5V
VGS = 3V
VGS = 6V
VGS = 4.5V
VGS = 4V
= 25°C unless otherwise noted
J
2.8
2.6
2.4
VGS = 3V
2.2
2.0
1.8
NORMALIZED
1.6
1.4
V
GS
1.2
1.0
DRAIN TO SOURCE ON-RESISTANCE
0.8
0 102030405060
ID, DRAIN CURRENT(A)
N o r m a l i z e d O n - R e s i s t a n c e
vs Drain Current and Gate Voltage
30
25
(mΩ)
ID = 6A
20
15
, DRAIN TO
10
DS(on)
r
5
SOURCE ON-RESISTANCE
0
246810
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4.
O n - R es i s t a n c e vs G a t e t o
Source Voltage
= 10V
T
= 25
J
PULSE DURATION = 300µs
DUTY CYCLE = 2.0%MAX
V
=3.5V
V
= 4.5V
GS
GS
PULSE DURATION = 300µs
DUTY CYCLE = 2.0%MAX
TJ = 125oC
o
C
V
= 4V
GS
V
= 6V
GS
®
MOSFET
60
50
40
30
20
, DRAIN CURRENT (A)
D
I
10
0
1.01.52.02.53.03.5
Figure 5. Transfer Characteristics
FDMS9600S Rev.D1
PULSE DURATION = 300µs
DUTY CYCLE = 2.0%MAX
VDD = 5V
TJ =125oC
VGS, GATE TO SOURCE VOLTAGE (V)
TJ = 25oC
TJ = -55oC
60
V
= 0V
GS
10
TJ = 125oC
1
0.1
TJ = 25oC
0.01
, REVERSE DRAIN CURRENT (A)
S
I
1E-3
0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6.
S o u r ce t o D r a i n Di o d e
TJ = -55oC
Forward Voltage vs Source Current
4
www.fairchildsemi.com
FDMS9600S Dual N-Channel PowerTrench
Typical Characteristics (Q1 N-Channel)T
10
ID = 12A
8
6
4
2
, GATE TO SOURCE VOLTAGE(V)
GS
0
V
0 5 10 15 20 25
Figure 7.
100
10
1
SINGLE PULSE
T
= MAX RATE
J
R
= 120oC/W
θJA
0.1
, DRAIN CURRENT (A)
T
= 25oC
D
I
A
THIS AREA IS LIMITED
BY r
0.01
DS(ON)
0.1 1 10 100
Figure 9.
V
=10V
DD
V
= 15V
DD
V
= 20V
DD
Qg, GATE CHARGE(nC)
Gate Charge Characteristics Figure 8.
1ms
10ms
100ms
1s
10s
DC
VDS, DRAIN to SOURCE VOLTAGE (V)
F o r w a r d B i a s S a f e
Operating Area
= 25°C unless otherwise noted
J
2000
1000
100
CAPACITANCE (pF)
f = 1MHz
= 0V
V
GS
30
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
300
100
VGS = 10V
10
1
), PEAK TRANSIENT POWER (W)
PK
0.5
P(
-3
10
-2
10
Figure 10.
C
iss
C
oss
C
rss
30
C a p a c i t a n c e v s D r a i n
to Source Voltage
SINGLE PULSE
= 120oC/W
R
θJA
T
= 25oC
A
-1
0
1
2
10
10
t, PULSE WIDTH (s)
10
10
3
10
S i n g l e P u l s e M a x im u m
P o w e r D i s s i p a ti o n
®
MOSFET
θJA
0.1
IMPEDANCE, Z
0.01
NORMALIZED THERMAL
0.002
FDMS9600S Rev.D1
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
-3
10
-2
10
NOTES:
DUTY FACTOR: D = t1/t
PEAK TJ = PDM x Z
-1
10
0
10
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 11. Transient Thermal Response Curve
5
P
DM
t
1
t
2
2
x R
+ T
θJA
θJA
A
2
10
3
10
www.fairchildsemi.com
Typical Characteristics (Q2 SyncFET)
FDMS9600S Dual N-Channel PowerTrench
60
VGS = 10V
50
40
30
VGS = 3.5V
VGS = 4V
VGS = 4.5V
VGS = 6V
20
, DRAIN CURRENT (A)
D
10
I
0
0.0 0.2 0.4 0.6 0.8 1.0
PULSE DURATION = 300µs
DUTY CYCLE = 2.0%MAX
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 12. On-Region Characteristics
1.8
ID = 16A
V
=10V
GS
1.6
1.4
1.2
1.0
NORMALIZED
0.8
0.6
DRAIN TO SOURCE ON-RESISTANCE
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 14. Normalized On-Resistance
vs Junction Temperature
VGS = 3V
2.8
2.6
2.4
V
=3V
GS
PULSE DURATION = 300µs
DUTY CYCLE = 2.0%MAX
2.2
V
= 3.5V
GS
V
= 4V
GS
NORMALIZED
2.0
V
1.8
1.6
GS
= 6V
V
= 4.5V
GS
1.4
1.2
1.0
DRAIN TO SOURCE ON-RESISTANCE
0.8
0 102030405060
ID, DRAIN CURRENT(A)
V
= 10V
GS
Figure 13. Normalized on-Resistance vS Drain
Current and Gate
14
12
(mΩ)
10
8
, DRAIN TO
6
DS(on)
r
4
SOURCE ON-RESISTANCE
2
246810
ID = 8A
o
T
= 25
C
J
VGS, GATE TO SOURCE VOLTAGE (V)
Voltage
PULSE DURATION = 300µs
DUTY CYCLE = 2.0%MAX
TJ = 125oC
Figure 15. On-Resistance vs Gate to
Source Voltage
®
MOSFET
60
50
40
30
20
, DRAIN CURRENT (A)
D
I
10
0
1.0 1.5 2.0 2.5 3.0 3.5 4.0
Figure 16. Transfer Characteristics
FDMS9600S Rev.D1
PULSE DURATION = 300µs
DUTY CYCLE = 2.0%MAX
VDD = 5V
TJ =125oC
VGS, GATE TO SOURCE VOLTAGE (V)
TJ = 25oC
TJ = -55oC
60
V
= 0V
GS
10
TJ = 125oC
1
0.1
TJ = 25oC
0.01
, REVERSE DRAIN CURRENT (A)
S
I
1E-3
0.0 0.2 0.4 0.6 0.8
VSD, BODY DIODE FORWARD VOLTAGE (V)
TJ = -55oC
Figure 17. Source to Drain Diode
Forward Voltage vs Source Current
6
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Typical Characteristics
FDMS9600S Dual N-Channel PowerTrench
10
ID = 16A
V
8
6
4
2
, GATE TO SOURCE VOLTAGE(V)
GS
0
V
0 1020304050
=10V
DD
V
= 20V
DD
Qg, GATE CHARGE(nC)
V
= 15V
DD
Figure 18. Gate Charge Characteristics
5000
C
iss
C
1000
CAPACITANCE (pF)
f = 1MHz
V
= 0V
GS
100
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
oss
C
rss
30
Figure 19. Capacitance vs Drain
to Source Voltage
®
MOSFET
FDMS9600S Rev.D1
7
www.fairchildsemi.com
Dimensional Outline and Pad Layout
FDMS9600S Dual N-Channel PowerTrench
®
MOSFET
FDMS9600S Rev.D1
8
www.fairchildsemi.com
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intended to be an exhaustive list of all such trademarks.
Build it Now™
CorePLUS™
CorePOWER™
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EZSWITCH™ *
™
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Fairchild Semiconductor
FACT Quiet Series™
FACT
FAST
FastvCore™
FlashWriter
®
®
tm
®
®
®
®
*
®
FPS™
* EZSWITCH™ and FlashWriter
F-PFS™
®
FRFET
Global Power Resource
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IntelliMAX™
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MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MillerDrive™
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OPTOLOGIC
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tm
PDP SPM™
Power-SPM™
®
are trademarks of System General Corporation, used under license by Fairchild Semiconductor.
®
®
SM
®
PowerTrench
Programmable Active Droop™
QFET
QS™
Quiet Series™
RapidConfigure™
Saving our world, 1mW /W /kW at a time™
SmartMax™
SMART START™
SPM
STEALTH™
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SuperSOT™-8
SupreMOS™
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®
®
™
®
®
The Power Franchise
TinyBoost™
tm
TinyBuck™
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TINYOPTO™
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TinyPWM™
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μSerDes™
UHC
Ultra FRFET™
UniFET™
VCX™
VisualMax™
®
®
®
FDMS9600S Dual N-Channel PowerTrench
®
MOSFET
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
2. A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
expected to result in a significant injury of the user.
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Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Farichild’s Anti-Counterfeiting Policy is also stated on our external website,
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Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their
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PRODUCT STATUS DEFINITIONS
Definition of Terms
.
Datasheet Identification Product Status Definition
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
Datasheet contains the design specifications for product development. Specifications may
change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make changes at any time without notice to
improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I36
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