Fairchild FDMS8025S service manual
FDMS8025S
4
3
2
1
5
6
7
8
Power 56
D
D
D
D
S
S
S
G
D
D
D
D
G
S
S
S
Pin 1
Bottom
Top
and
TM
General Description
The FDMS8025S has been designed to minimize losses in
power conversion application. Advancements in both silicon and
package technologies have been combined to offer the lowest
r
while maintaining excellent switching performance.This
DS(on)
device has the added benefit of an efficient monolithic Schottky
body diode.
Applications
Synchronous Rectifier for DC/DC Converters
Notebook Vcore/GPU low side switch
Networking Point of Load low side switch
Telecom secondary side rectification
N-Channel PowerTrench® SyncFET
30 V, 49 A, 2.8 mΩ
Features
Max r
Max r
Advanced package and silicon combination for low r
high efficiency
SyncFET Schottky Body Diode
MSL1 robust package design
100% UIL tested
RoHS Compliant
= 2.8 mΩ at VGS = 10 V, ID = 24 A
DS(on)
= 3.5 mΩ at VGS = 4.5 V, ID = 21 A
DS(on)
DS(on)
FDMS8025S N-Channel PowerTrench
August 2010
®
SyncFET
TM
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Drain to Source Voltage 30 V
Gate to Source Voltage ±20 V
Drain Current -Continuous (Package limited) TC = 25°C 49
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 100
Single Pulse Avalanche Energy (Note 3) 66 mJ
Power Dissipation TC = 25°C 50
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
= 25°C unless otherwise noted
C
= 25°C 109
C
= 25°C (Note 1a) 24
A
= 25°C (Note 1a) 2.5
A
A
W
Thermal Characteristics
R
θJC
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDMS8025S FDMS8025S Power 56 13 ’’ 12
©2010 Fairchild Semiconductor Corporation
FDMS8025S Rev.C1
Thermal Resistance, Junction to Case 2.5
Thermal Resistance, Junction to Ambient (Note 1a) 50
1
°C/W
mm 3000 units
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FDMS8025S N-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV
ΔT
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage I
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current V
Gate to Source Leakage Current, Forward V
= 1 mA, VGS = 0 V30 V
D
I
= 10 mA, referenced to 25°C 19 mV/°C
D
= 24 V, V
DS
= 20 V, V
GS
= 0 V500μA
GS
= 0 V 100nA
DS
On Characteristics
V
GS(th)
ΔV
ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, I
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance V
I
= 10 mA, referenced to 25°C -5 mV/°C
D
V
= 10 V, ID = 24 A 2.22.8
GS
= 4.5 V, ID = 21 A3.03.5
GS
= 10 V, ID = 24 A, T
V
GS
= 5 V, ID = 24 A 145 S
DS
= 1 mA 1.2 1.7 3.0 V
D
= 125°C 3.1 4.0
J
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 815 1085 pF
Reverse Transfer Capacitance 85 125 pF
Gate Resistance 1.0 2.5 Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g
g
gs
gd
Turn-On Delay Time
Rise Time 4.5 10 ns
Turn-Off Delay Time 29 46 ns
Fall Time 3.7 10 ns
Total Gate Charge V
Total Gate Charge V
Gate to Source Charge 5.9 nC
Gate to Drain “Miller” Charge 4.6 nC
= 15 V, VGS = 0 V,
V
DS
f = 1MHz
= 15 V, ID = 24 A,
V
DD
V
= 10 V, R
GS
= 0 V to 10 V
GS
= 0 V to 4.5 V1623nC
GS
GEN
= 6 Ω
V
DD
I
= 24 A
D
= 15 V,
2255 3000 pF
11 19 ns
34 47 nC
mΩV
®
SyncFET
TM
Drain-Source Diode Characteristics
V
= 0 V, IS = 2 A (Note 2) 0.62 0.8
V
SD
t
rr
Q
rr
Notes:
1. R
is determined with the devi ce m ount ed on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJA
the user's board design.
Source-Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 27 44 nC
a. 50 °C/W when mounted on a
2
1 in
pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 66 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = 21 A, VDD = 27 V, VGS = 10 V.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
©2010 Fairchild Semiconductor Corporation
FDMS8025S Rev.C1
GS
= 0 V, IS = 24 A (Note 2) 0.8 1.2
V
GS
= 24 A, di/dt = 300 A/μs
I
F
2
26 42 ns
is guaranteed by design while R
θJC
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
V
is determined by
θCA
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FDMS8025S N-Channel PowerTrench
0.00.51.01.52.0
0
20
40
60
80
100
VGS = 4.5 V
VGS = 4 V
VGS = 3.5 V
VGS = 6 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 3 V
VGS = 10 V
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
020406080100
0
2
4
6
8
VGS = 6 V
VGS = 3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
I
D
, DRAIN CURRENT (A)
V
GS
= 4 V
VGS = 4.5 V
VGS = 3 V
V
GS
= 10 V
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
ID = 24 A
V
GS
= 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
T
J
, JUNCTION TEMPERATURE (
o
C)
246810
0
3
6
9
12
TJ = 125 oC
ID = 24 A
TJ = 25 oC
V
GS
, GATE TO S OURCE VO L TAGE (V)
r
DS(on)
,
DRAIN TO
SOURCE ON-RESISTANCE
(mΩ)
PULSE DURATION = 80 μ s
DUTY CYCLE = 0.5% MAX
1234
0
20
40
60
80
100
TJ = 125 oC
V
DS
= 5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
I
D
, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
0.0 0.2 0.4 0.6 0.8 1.0
0.001
0.01
0.1
1
10
100
TJ = -55 oC
TJ = 25 oC
TJ = 125 oC
V
GS
= 0 V
I
S
, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Typical Characteristics T
Figure 1.
On Region Characteristics Figure 2.
= 25°C unless otherwise noted
J
Norma l i z e d O n - Resistance
vs Drain Current and Gate Voltage
®
SyncFET
TM
Fig ure 3. Norm a lized On Re s ista n ce
vs Junction Temperature
©2010 Fairchild Semiconductor Corporation
FDMS8025S Rev.C1
Figure 5. Transfer Characteristics
Figure 4.
On-Resis tance vs Gate to
Source Voltage
Figure 6.
Source to Drain Diode
Forward Voltage vs Source Current
3
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