Fairchild FDMS8023S service manual

FDMS8023S
4 3 2 1
5 6 7 8
Power 56
D
D
D
D
S
S
S
G
D D
D
D
G
S
S
S
Pin 1
Bottom
Top
and
TM
General Description
The FDMS8023S has been designed to minimize losses in power conversion application. Advancements in both silicon and package technologies have been combined to offer the lowest r
while maintaining excellent switching performance.This
DS(on)
device has the added benefit of an efficient monolithic Schottky body diode.
Applications
Synchronous Rectifier for DC/DC ConvertersNotebook Vcore/GPU low side switchNetworking Point of Load low side switchTelecom secondary side rectification
N-Channel PowerTrench® SyncFET
30 V, 49 A, 2.4 mΩ Features
Max rMax rAdvanced package and silicon combination for low r
high efficiency
SyncFET Schottky Body DiodeMSL1 robust package design100% UIL testedRoHS Compliant
= 2.4 mΩ at VGS = 10 V, ID = 26 A
DS(on)
= 3.0 mΩ at VGS = 4.5 V, ID = 23 A
DS(on)
DS(on)
FDMS8023S N-Channel PowerTrench
August 2010
®
SyncFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Drain to Source Voltage 30 V Gate to Source Voltage (Note 4) ±20 V Drain Current -Continuous (Package limited) TC = 25°C 49
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 100 Single Pulse Avalanche Energy (Note 3) 86 mJ Power Dissipation TC = 25°C 59 Power Dissipation T Operating and Storage Junction Temperature Range -55 to +150 °C
= 25°C unless otherwise noted
C
= 25°C 128
C
= 25°C (Note 1a) 26
A
= 25°C (Note 1a) 2.5
A
A
W
Thermal Characteristics
R
θJC
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDMS8023S FDMS8023S Power 56 13 ’’ 12
©2010 Fairchild Semiconductor Corporation FDMS8023S Rev.C1
Thermal Resistance, Junction to Case 2.1 Thermal Resistance, Junction to Ambient (Note 1a) 50
1
°C/W
mm 3000 units
www.fairchildsemi.com
FDMS8023S N-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV ΔT
I
DSS
I
GSS
DSS
DSS J
Drain to Source Breakdown Voltage I Breakdown Voltage Temperature
Coefficient Zero Gate Voltage Drain Current V Gate to Source Leakage Current, Forward V
= 1 mA, VGS = 0 V30 V
D
I
= 10 mA, referenced to 25°C 16 mV/°C
D
= 24 V, V
DS
= 20 V, V
GS
= 0 V500μA
GS
= 0 V 100nA
DS
On Characteristics
V
GS(th)
ΔV ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, I Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance V
I
= 10 mA, referenced to 25°C -5 mV/°C
D
V
= 10 V, ID = 26 A 2.02.4
GS
= 4.5 V, ID = 23 A2.63.0
GS
= 10 V, ID = 26 A, T
V
GS
= 5 V, ID = 26 A 168 S
DS
= 1 mA 1.2 1.7 3.0 V
D
= 125°C 2.7 3.3
J
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance Output Capacitance 975 1300 pF Reverse Transfer Capacitance 95 140 pF Gate Resistance 0.7 2.5 Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q Q Q Q
g g gs gd
Turn-On Delay Time Rise Time 510ns Turn-Off Delay Time 32 52 ns Fall Time 410ns Total Gate Charge V Total Gate Charge V Gate to Source Charge 7.0 nC Gate to Drain “Miller” Charge 5.4 nC
= 15 V, VGS = 0 V,
V
DS
f = 1MHz
= 15 V, ID = 26 A,
V
DD
V
= 10 V, R
GS
= 0 V to 10 V
GS
= 0 V to 4.5 V2028nC
GS
GEN
= 6 Ω
V
DD
I
= 26 A
D
= 15 V,
2670 3550 pF
12 21 ns
41 57 nC
mΩV
®
SyncFET
Drain-Source Diode Characteristics
V
= 0 V, IS = 2 A (Note 2) 0.63 0.8
V
SD
t
rr
Q
rr
Notes:
1. R
is determined with the devi ce m ount ed on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJA
the user's board design.
Source-Drain Diode Forward Voltage Reverse Recovery Time
Reverse Recovery Charge 32 51 nC
a. 50 °C/W when mounted on a
2
1 in
pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 86 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = 24 A, VDD = 27 V, VGS = 10 V.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
©2010 Fairchild Semiconductor Corporation FDMS8023S Rev.C1
GS
= 0 V, IS = 26 A (Note 2) 0.8 1.2
V
GS
= 26 A, di/dt = 300 A/μs
I
F
2
29 46 ns
is guaranteed by design while R
θJC
b. 125 °C/W when mounted on a minimum pad of 2 oz copper.
V
is determined by
θCA
www.fairchildsemi.com
FDMS8023S N-Channel PowerTrench
0.00.51.01.52.0
0
20
40
60
80
100
VGS = 4.5 V VGS = 4 V
VGS = 3.5 V
VGS = 6 V
PULSE DURA TION = 80 μs DUTY CYCLE = 0.5% MAX
VGS = 3 V
VGS = 10 V
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
0 20 40 60 80 100
0
1
2
3
4
5
VGS = 6 V
VGS = 3.5 V
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
I
D
, DRAIN CURRENT (A)
V
GS
= 4 V
VGS = 4.5 V
VGS = 3 V
V
GS
= 10 V
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
ID = 26 A V
GS
= 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
T
J
, JUNCTION TEMPERA TURE (
o
C)
246810
0
3
6
9
12
TJ = 125 oC
ID = 26 A
TJ = 25 oC
V
GS
, GATE TO SOURCE VOL TAG E (V)
r
DS(on)
,
DRAIN TO
SOURCE ON-RESISTANCE
(mΩ)
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
1.0 1.5 2.0 2.5 3.0 3.5 4 .0
0
20
40
60
80
100
TJ = 125 oC
V
DS
= 5 V
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
I
D
, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.1
1
10
100
TJ = -55 oC
TJ = 25 oC
TJ = 125 oC
V
GS
= 0 V
I
S
, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Typical Characteristics T
Figure 1.
On Region Characteristics
= 25°C unless otherwise noted
J
Figure 2.
Norma l i z e d O n - Resistance
vs Drain Current and Gate Voltage
®
SyncFET
Fig ure 3. Norm a lized On Re s ista n ce
vs Junction Temperature
©2010 Fairchild Semiconductor Corporation FDMS8023S Rev.C1
Figure 5. Transfer Characteristics
Figure 4.
On-Resis tance vs Gate to
Source Voltage
Figure 6.
Source to Drain Diode
Forward Voltage vs Source Current
3
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