N-Channel: 30 V, 30 A, 7.5 mΩ N-Channel: 30 V, 40 A, 2.4 mΩ
Features
Q1: N-Channel
Max r
Max r
Q2: N-Channel
Max r
Max r
RoHS Compliant
= 7.5 mΩ at VGS = 10 V, ID = 12 A
DS(on)
= 12 mΩ at VGS = 4.5 V, ID = 10 A
DS(on)
= 2.4 mΩ at VGS = 10 V, ID = 20 A
DS(on)
= 2.9 mΩ at VGS = 4.5 V, ID = 18 A
DS(on)
General Description
This device includes two specialized N-Channel MOSFETs in a
dual MLP package.The switch node has been internally
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
SyncFET (Q2) have been designed to provide optimal power
efficiency.
Applications
Computing
Communications
General Purpose Point of Load
Notebook VCORE
FDMS7700S Dual N-Channel PowerTrench
December 2009
®
MOSFET
S2
S2
S2
S1/D2
D1
D1
D1
D1
TopBottom
MOSFET Maximum RatingsT
SymbolParameterQ1Q2Units
V
DS
V
GS
I
D
P
D
TJ, T
STG
Drain to Source Voltage3030V
Gate to Source Voltage (Note 3)±20±20V
Drain Current -Continuous (Package limited) TC = 25 °C 3040
-Continuous (Silicon limited) T
-Continuous T
-Pulsed4060
Power Dissipation for Single Operation TA = 25 °C2.2
T
Operating and Storage Junction Temperature Range-55 to +150°C
Power 56
= 25 °C unless otherwise noted
A
G1
G2
S2
S2
S2
G2
= 25 °C50120
C
= 25 °C12
A
= 25 °C1.0
A
Q 2
5
6
7
8
1a
1a
1c
Q 1
1b
22
1b
2.5
1d
1.0
Thermal Characteristics
R
θJA
θJA
R
θJC
Thermal Resistance, Junction to Ambient 57
Thermal Resistance, Junction to Ambient 125
Thermal Resistance, Junction to Case 3.52
is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
a. 57 °C/W when mounted on
2
a 1 in
pad of 2 oz copper
c. 125 °C/W when mounted on a
minimum pad of 2 oz copper
GS
V
= 0 V, IS = 20 A (Note 2)Q1Q2
GS
Q1
I
= 12 A, di/dt = 100 A/µs
F
Q2
I
= 20 A, di/dt = 300 A/µs
F
Q1
Q2
Q1
Q2
is guaranteed by design while R
θJC
b. 50 °C/W when mounted on
a 1 in
d. 120 °C/W when mounted on a
minimum pad of 2 oz copper
2
pad of 2 oz copper
1.2
0.7
1.2
275343
85
10
10018160
θCA
is determined
V
ns
nC
®
MOSFET
2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3: As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.