FDMS7660
N-Channel PowerTrench® MOSFET
30 V, 2.8 mΩ
Features
Max r
Max r
Advanced Package and Silicon combination for low r
high efficiency
Next generation enhanced body diode technology, engineered
for soft recovery. Provides Schottky-like performance with
minimum EMI in sync buck converter applications
MSL1 robust package design
100% UIL tested
RoHS Compliant
= 2.8 mΩ at VGS = 10 V, ID = 25 A
DS(on)
= 3.5 mΩ at VGS = 4.5 V, ID = 19 A
DS(on)
DS(on)
and
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers. It has been optimized
for low gate charge, low r
diode reverse recovery performance.
Applications
IMVP Vcore Switching for Notebook
VRM Vcore Switching for Desktop and Server
OringFET / Load Switch
DC-DC Conversion
April 2009
, fast switching speed and body
DS(on)
FDMS7660 N-Channel PowerTrench
®
MOSFET
Top
D
Bottom
D
D
D
Pin 1
S
S
S
G
D
5
D
6
D
7
8
D
4
3
2
1
Power 56
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Drain to Source Voltage 30 V
Gate to Source Voltage (Note 4) ±20 V
Drain Current -Continuous (Package limited) TC = 25 °C 42
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 150
Single Pulse Avalanche Energy (Note 3) 128 mJ
Power Dissipation TC = 25 °C 78
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
= 25 °C unless otherwise noted
A
= 25 °C 144
C
= 25 °C (Note 1a) 25
A
= 25 °C (Note 1a) 2.5
A
Thermal Characteristics
G
S
S
S
A
W
R
θJC
R
θJA
Thermal Resistance, Junction to Case 1.6
Thermal Resistance, Junction to Ambient (Note 1a) 50
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDMS7660 FDMS7660 Power 56 13 ’’ 12 mm 3000 units
©2009 Fairchild Semiconductor Corporation
660 Rev. D
FDMS7
°C/W
1
www.fairchildsemi.com
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
∆BV
∆T
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage ID = 250 µA, VGS = 0 V 30 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 24 V, V
Gate to Source Leakage Current, Forward VGS = 20 V, V
= 250 µA, referenced to 25 °C 17 mV/°C
I
D
= 0 V 1 µA
GS
= 0 V 100 nA
DS
On Characteristics
V
GS(th)
∆V
∆T
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 µA 1.25 1.9 3.0 V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 µA, referenced to 25 °C -7 mV/°C
D
V
= 10 V , ID = 25 A 1.9 2.8
GS
= 4.5 V, ID = 19 A 2.7 3.5
GS
= 10 V, ID = 25 A, TJ = 125 °C 2.5 3.7
V
GS
Forward Transconductance VDS = 5 V, ID = 25 A 250 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 1380 1830 pF
Reverse Transfer Capacitance 125 190 pF
= 15 V, VGS = 0 V,
V
DS
f = 1 MHz
Gate Resistance 0.9 2.0 Ω
4185 5565 pF
FDMS7660 N-Channel PowerTrench
mΩV
®
MOSFET
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g
g
gs
gd
Turn-On Delay Time
Rise Time 918ns
Turn-Off Delay Time 37 60 ns
Fall Time 713ns
Total Gate Charge VGS = 0 V to 10 V
Total Gate Charge VGS = 0 V to 4.5 V 27 38 nC
Gate to Source Charge 12.3 nC
Gate to Drain “Miller” Charge 7.2 nC
V
= 15 V, ID = 25A,
DD
= 10 V, R
V
GS
GEN
Drain-Source Diode Characteristics
V
= 0 V, IS = 2.1 A (Note 2) 0.7 0.95
V
SD
t
rr
Q
rr
t
a
t
b
S Softness (t
t
rr
Q
rr
Notes:
1. R
is determined with the device mount ed on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 mate rial . R
θJA
the user's board design.
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 26 42 nC
Reverse Recovery Fall Time 19 nC
Reverse Recovery Rise Time 27 nC
) 1.4
b/ta
Reverse Recovery Time
Reverse Recovery Charge 43 68 nC
a. 50 °C/W when mounted on a
2
1 in
GS
= 0 V, IS = 25 A (Note 2) 0.8 1.1
V
GS
= 25 A, di/dt = 100 A/µs
I
F
= 25 A, di/dt = 300 A/µs
I
F
pad of 2 oz copper.
= 6 Ω
V
DD
= 25 A
I
D
= 15 V,
θJC
17 31 ns
60 84 nC
46 74 ns
36 58 ns
is guaranteed by design while R
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
is determined by
θCA
V
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3. EAS of 128 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 16 A, VDD = 27 V, VGS = 10 V. 100% test at L = 0.3 mH, I
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
©2009 Fairchild Semiconductor Corporation
FDMS7660 Rev.
D
2
AS
= 23 A.
www.fairchildsemi.com
FDMS7660 N-Channel PowerTrench
Typical Characteristics T
150
120
90
60
DRAIN CURRENT (A)
,
30
D
I
0
0 0.5 1.0 1.5 2.0
V
Figure 1.
1.6
ID = 25 A
V
= 10 V
GS
1.4
1.2
1.0
NORMALIZED
0.8
DRAIN TO SOURCE ON-RESISTANCE
0.6
-75 -50 -25 0 25 50 75 100 125 150
T
Fig u r e 3. Nor m alize d O n - Resi s t ance
vs Junction Temperature
VGS = 10 V
VGS = 4.5 V
VGS = 4 V
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
, DRAIN TO SOURCE VOLTAGE (V)
DS
On-Region Characteristics Figure 2.
, JUNCTION TEMPERATURE (
J
= 25°C unless otherwise noted
J
VGS = 3.5 V
VGS = 3 V
o
C)
14
12
VGS = 3 V
10
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
8
V
= 3.5 V
6
NORMALIZED
4
2
DRAIN TO SOURCE ON-RESISTANCE
0
0306090120150
GS
V
= 10 V
GS
I
,
DRAIN CURRENT (A)
D
V
GS
= 4.5 V
VGS = 4 V
Norm a l i z e d O n -Resista n c e
vs Drain Current and Gate Voltage
10
)
Ω
m
8
(
6
DRAIN TO
,
4
DS(on)
r
2
SOURCE ON-RESISTANCE
0
246810
V
,
GATE TO SOURCE VOLTAG E (V)
GS
Figure 4.
On-Resistan ce vs Gate to
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
ID = 25 A
TJ = 125 oC
TJ = 25 oC
Source Voltage
®
MOSFET
150
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
120
V
= 5 V
DS
90
60
, DRAIN CURRENT (A)
30
D
I
0
12345
TJ = 150 oC
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
©2009 Fairchild Semiconductor Corporation
FDMS7660 Rev.
D
200
V
GS
= 0 V
TJ = 150 oC
100
10
TJ = 25 oC
TJ = -55 oC
1
, REVERSE DRAIN CURRENT (A)
S
I
0.1
0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6.
Source to Drain Di ode
TJ = 25 oC
TJ = -55 oC
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDMS7660 N-Channel PowerTrench
Typical Characteristics T
10
ID = 25 A
8
6
V
DD
4
2
, GATE TO SOURCE VOLTAGE (V)
GS
V
0
0 15304560
Figure 7.
Gate Charge Characteristics Figure 8.
100
10
, AVALANCHE CURRENT (A)
AS
I
1
0.01 0.1 1 10 100 1000
tAV, TIME IN AVALANCHE (ms)
Figure 9.
Switching Capability
VDD = 15 V
= 10 V
Qg, GATE CHARGE (nC)
TJ = 25 oC
TJ = 125 oC
Uncl a m p e d I n duct i v e
= 25°C unless otherwise noted
J
VDD = 20 V
TJ = 100 oC
10000
1000
100
CAPACITANCE (pF)
f = 1 MHz
V
= 0 V
GS
10
0.1 1 10 30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Capacitance vs Drain
to Source Voltage
150
120
V
= 10 V
GS
90
V
= 4.5 V
GS
60
DRAIN CURRENT (A)
,
D
I
30
Limited by Package
0
25 50 75 100 125 150
T
,
CASE TEMPERATURE
c
Figure 10.
Ma ximum Con tinuous D rai n
R
θJC
= 1.6 oC/W
(
Current vs Case Temperature
C
iss
C
oss
C
rss
®
MOSFET
o
C
)
500
100
10
THIS AREA IS
1
LIMITED BY r
, DRAIN CURRENT (A)
D
I
0.1
0.01
0.01 0.1 1 10 100
DS(on)
SINGLE PULSE
= MAX RATED
T
J
R
= 125 oC/W
θ
JA
T
= 25 oC
A
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
©2009 Fairchild Semiconductor Corporation
FDMS7660 Rev.
D
2000
1000
100 us
100
1 ms
10 ms
100 ms
1 s
10 s
DC
10
PEAK TRANSIENT POWER (W)
,
)
1
PK
(
P
0.5
10-410-310-210
Figure 12.
VGS = 10 V
SINGLE PULSE
R
= 125 oC/W
θ
JA
T
= 25 oC
A
-1
t, PULSE WIDTH (sec)
110
100 1000
Sing le Pulse Ma ximum
Power Dissipation
4
www.fairchildsemi.com
FDMS7660 N-Channel PowerTrench
Typical Characteristics T
NORMALIZED THERMAL
CURRENT (A)
θJA
Z
IMPEDANCE,
0.001
0.0001
30
25
20
15
10
5
2
1
0.1
0.01
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
-4
10
-3
10
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
di/dt = 300 A/µs
= 25°C unless otherwise noted
J
SINGLE PULSE
R
= 125 oC/W
θJA
-2
10
t, RECTANGULAR PULSE DURATION (sec)
-1
10
P
DM
NOTES:
DUTY FACTOR: D = t1/t
PEAK TJ = PDM x Z
θJA
110
Figure 15.
t
1
t
2
2
x R
+ T
θJA
A
100 1000
®
MOSFET
0
-5
0 40 80 120 160 200 240
TIME (ns)
Figure 14.
Bo dy Di ode R eve rse
Recovery Characteristics
©2009 Fairchild Semiconductor Corporation
FDMS7660 Rev.
D
5
www.fairchildsemi.com
Dimensional Outline and Pad Layout
FDMS7660 N-Channel PowerTrench
®
MOSFET
©2009 Fairchild Semiconductor Corporation
FDMS7660 Rev.
D
6
www.fairchildsemi.com
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
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THEREIN, WHICH COVERS THESE PRODUCTS.
FDMS7660 N-Channel PowerTrench
®
MOSFET
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the bo dy or (b ) sup port or su stain li fe,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
ANTI-COUNTERFEITING POLICY
Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,
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Counterfeiting of semiconductor parts is a growing problem in the industry. Al l manufactures of semiconductor products are exper iencing counterfeiting of th eir
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PRODUCT STATUS DEFINITIONS
Definition of Terms
.
2. A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
Datasheet Identification Product Status Definition
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
©2009 Fairchild Semiconductor Corporation
FDMS7660 Rev.
D
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
7
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Rev. I40
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