Fairchild FDMC8200S service manual

FDMC8200S
Bottom
Bottom
Power33
Pin 1
G1
D1
D1
D1
D1
D
2
/
S
1
G2
S2
S2
S2
V
IN
V
IN
V
IN
V
IN
S
W
I
T
C
H
N
O
D
E
G
LS
GND
GND
GND
G
HS
Dual N-Channel PowerTrench® MOSFET
30 V, 10 mΩ, 20 mΩ
FDMC8200S Dual N-Channel PowerTrench
March 2011
Features
Q1: N-Channel
Max rMax r
Q2: N-Channel
Max rMax rRoHS Compliant
= 20 mΩ at VGS = 10 V, ID = 6 A
DS(on)
= 32 mΩ at VGS = 4.5 V, ID = 5 A
DS(on)
= 10 mΩ at VGS = 10 V, ID = 8.5 A
DS(on)
= 13.5 mΩ at VGS = 4.5 V, ID = 7.2 A
DS(on)
General Description
This device includes two specialized N-Channel MOSFETs in a due power33(3mm X 3mm MLP) package. The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous MOSFET (Q2) have been designed to provide optimal power efficiency.
Applications
Mobile ComputingMobile Internet DevicesGeneral Purpose Point of Load
Q 2
5 6 7 8
Q 1
4 3 2 1
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Q1 Q2 Units
V
DS
V
GS
I
D
E
AS
P
D
TJ, T
STG
Drain to Source Voltage 30 30 V Gate to Source Voltage (Note 4) ±20 ±20 V Drain Current -Continuous (Package limited) TC = 25 °C 18 13
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 40 27 Single Pulse Avalanche Energy (Note 3) 12 32 Power Dissipation for Single Operation TA = 25°C 1.9 Power Dissipation for Single Operation T Operating and Storage Junction Temperature Range -55 to +150 °C
= 25°C unless otherwise noted
C
= 25 °C 23 46
C
= 25 °C 6
A
= 25°C 0.7
A
1a
1a 1c
8.5
2.5
1.0
1b
1b 1d
A
W
Thermal Characteristics
R
θJA θJA
R
θJC
Package Marking and Ordering Information
©2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMC8200S Rev.C4
Device Marking Device Package Reel Size Tape Width Quantity
FDMC8200S FDMC8200S Power 33 13” 12
Thermal Resistance, Junction to Ambient 65 Thermal Resistance, Junction to Ambient 180 Thermal Resistance, Junction to Case 7.5 4.2
1a
1c
mm 3000 units
50
125
1b
1d
°C/WR
FDMC8200S Dual N-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Type Min Typ Max Units
Off Characteristics
BV
ΔBV ΔT
I
DSS
I
GSS
DSS
DSS J
Drain to Source Breakdown Voltage Breakdown Voltage Temperature
Coefficient Zero Gate Voltage Drain Current V
Gate to Source Leakage Current V
= 250 μA, VGS = 0 V
D
I
= 1mA, V
D
I
= 250 μA, referenced to 25°C
D
I
= 1mA, referenced to 25°C
D
= 24 V, V
DS
= ±20 V, V
GS
GS
= 0 V
= 0 V
GS
= 0 V
DS
Q1Q230
30
Q1 Q2
Q1 Q2
Q1 Q2
V
14 13
mV/°C
1
500 100
100nAnA
I
On Characteristics
V
V
GS(th)
ΔV ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
= VDS, I
GS
V
= VDS, ID = 1mA
GS
I
= 250 μA, referenced to 25°C
D
I
= 1mA, referenced to 25°C
D
= 10 V, ID = 6 A
V
GS
V
= 4.5 V, ID = 5 A
GS
V
= 10 V, ID = 6 A, T
GS
V
= 10 V, ID = 8.5 A
GS
V
= 4.5 V, ID = 7.2 A
GS
V
= 10 V, ID = 8.5 A, T
GS
V
= 5 V, ID = 6 A
DD
V
= 5 V, ID = 8.5 A
DD
= 250 μA
D
= 125°C
J
= 125°C
J
Q1Q21.0
1.0
Q1 Q2
Q1
Q2
Q1 Q2
2.3
2.0
-5
-6
16 24 22
7.8
10.3
11.4 29
43
3.0
3.0 mV/°C
20 32 28
10.0
13.5
13.1
μA
V
mΩ
S
®
MOSFET
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g(TOT)
g(TOT)
gs
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge V
Total Gate Charge V
Gate to Source Charge
Gate to Drain “Miller” Charge
= 15 V, VGS = 0 V, f = 1 MHZ
V
DS
Q1 V
= 15 V, ID = 1 A,
DD
V
= 10 V, R
GS
GEN
= 6 Ω
Q2
= 15 V, ID = 1 A,
V
DD
V
= 10 V, R
GS
= 0 V to 10 V
GS
= 0 V to 4.5 V
GS
GEN
= 6 Ω
Q1 V
DD
I
= 6 A
D
Q2 V
DD
I
= 8.5 A
D
= 15 V,
= 15 V
Q1 Q2
Q1 Q2
Q1 Q2
Q1Q20.2
0.2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
495
660
1080
1436
145
195
373
495
20 35
1.4
1.2
11
7.62015
3.1
1.81010 35
21
1.3
8.51017
7.3
15.71022
3.1
7.2
1.8
3 1
1.9
30 52
4.2
3.6
56 34
4.3 10
pF
pF
pF
Ω
ns
ns
ns
ns
nC
nC
nC
nC
©2011 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDMC8200S Rev.C4
Electrical Characteristics T
a.65 °C/W when mounted on a 1 in
2
pad of 2 oz copper
c. 180 °C/W when mounted on a minimum pad of 2 oz copper
b.50 °C/W when mounted on a 1 in
2
pad of 2 oz copper
d. 125 °C/W when mounted on a minimum pad of 2 oz copper
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Type Min Typ Max Units
Drain-Source Diode Characteristics
= 0 V, IS = 6 A (Note 2)
V
GS
V
SD
t
rr
Q
rr
Notes:
1. R
is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJA
by the user's board design.
Source-Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
= 0 V, IS = 8.5 A (Note 2)
GS
V
= 0 V, IS = 1.3 A (Note 2)
GS
Q1 I
= 6 A, di/dt = 100 A/s
F
Q2 I
= 8.5 A, di/dt = 300 A/s
F
Q1 Q2 Q2
Q1 Q2
Q1 Q2
is guaranteed by design while R
θJC
1.2
0.8
1.2
0.8
0.8
0.6 13
24
20
32
2.31510
24
θCA
is determined
ns
nC
FDMC8200S Dual N-Channel PowerTrench
V
®
MOSFET
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3.Starting Q1: T = 25 °C, L = 1 mH, I = 5 A, Vgs = 10V, Vdd = 27V, 100% test at L = 3 mH, I = 4 A; Q2: T = 25°C, L = 1 mH, I = 8 A, Vgs = 10V, Vdd = 27V, 100% test at L = 3 mH, I = 3.2 A.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
©2011 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDMC8200S Rev.C4
FDMC8200S Dual N-Channel PowerTrench
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0
10
20
30
40
VGS = 10 V
VGS = 4 V
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
VGS = 3.5 V
VGS = 4.5 V
VGS = 6 V
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
0 10203040
0
1
2
3
4
VGS = 3.5 V
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
I
D
, DRAIN CURRENT (A)
V
GS
= 4 V
VGS = 4.5 V
VGS = 6 V
V
GS
= 10 V
-75 -50 -25 0 25 50 75 100 125 150
0.8
1.0
1.2
1.4
1.6
ID = 6 A V
GS
= 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANC E
T
J
, JUNCTION TEMPERATURE (
o
C)
246810
0
20
40
60
80
100
TJ = 125 oC
ID = 6 A
TJ = 25 oC
V
GS
, GATE TO SOURCE VOLTA GE (V)
r
DS(on)
,
DRAIN TO
SOURCE ON-RESISTANCE
(mΩ)
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
2.0 2.5 3.0 3.5 4.0 4.5
0
10
20
30
40
TJ = 150 oC
V
DS
= 5 V
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
I
D
, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
10
40
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
V
GS
= 0 V
I
S
, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Typical Characteristics (Q1 N-Channel) T
Figure 1.
On Region Characteristics Figure 2.
= 25°C unless otherwise noted
J
Nor ma liz ed On- Res is tan ce
vs Drain Current and Gate Voltage
®
MOSFET
Fi gu re 3. No rmalized On Resistance
vs Junction Temperature
©2011 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDMC8200S Rev.C4
Figure 5. Transfer Characteristics
Figure 4.
On-Resi stance vs Gate to
Source Voltage
Figure 6.
Source to Drain Diode
Forward Voltage vs Source Current
Loading...
+ 8 hidden pages