Fairchild FDMC8026S service manual
FDMC8026S
MLP 3.3x3.3
Bottom
D
D
D
D
S
S
S
G
Top
Pin 1
G
S
S
S
D
D
D
D
5
6
7
8
3
2
1
4
and
TM
General Description
The FDMC8026S has been designed to minimize losses in
power conversion application. Advancements in both silicon and
package technologies have been combined to offer the lowest
r
while maintaining excellent switching performance.This
DS(on)
device has the added benefit of an efficient monolithic schottky
body diode.
Applications
Synchronous Rectifier for DC/DC Converters
Notebook Vcore/GPU low side switch
Networking Point of Load low side switch
Telecom secondary side rectification
N-Channel PowerTrench® SyncFET
30 V, 21 A, 4.4 mΩ
Features
Max r
Max r
Advanced package and silicon combination for low r
high efficiency
SyncFET Schottky Body Diode
MSL1 robust package design
100% UIL tested
RoHS Compliant
= 4.4 mΩ at VGS = 10 V, ID = 19 A
DS(on)
= 5.2 mΩ at VGS = 4.5 V, ID = 17.5 A
DS(on)
DS(on)
FDMC8026S N-Channel PowerTrench
March 2011
®
SyncFET
TM
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Drain to Source Voltage 30 V
Gate to Source Voltage (Note 4) ±20 V
Drain Current -Continuous (Package limited) TC = 25°C 21
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 100
Single Pulse Avalance Energy (Note 3) 66 mJ
Power Dissipation TC = 25°C 36
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
A
Thermal Characteristics
R
θJC
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDMC8026S FDMC8026S MLP 3.3X3.3 13 ’’ 12
©2011 Fairchild Semiconductor Corporation
FDMC8026S Rev.C3
Thermal Resistance, Junction to Case 3.4
Thermal Resistance, Junction to Ambient (Note 1a) 53
= 25 °C unless otherwise noted
= 25°C 76
C
= 25°C (Note 1a) 19
A
= 25°C (Note 1a) 2.4
A
1
mm 3000 units
www.fairchildsemi.com
A
W
°C/W
FDMC8026S N-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV
ΔT
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage I
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current V
Gate to Source Leakage Current, Forward V
= 1 mA, VGS = 0 V30 V
D
I
= 10 mA, referenced to 25 °C 26 mV/°C
D
= 24 V, V
DS
= 20 V, V
GS
= 0 V500μA
GS
= 0 V 100nA
DS
On Characteristics
V
GS(th)
ΔV
ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, I
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance V
I
= 10 mA, referenced to 25 °C -5 mV/°C
D
= 10 V, ID = 19 A 3.84.4
V
GS
V
= 4.5 V, ID = 17.5 A4.55.2
GS
= 10 V, ID = 19 A,
V
GS
T
= 125 °C
J
= 5 V, ID = 19 A 106 S
DS
= 1 mA 1.2 1.6 3.0 V
D
4.5 5.8
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 885 1175 pF
Reverse Transfer Capacitance 100 150 pF
= 15 V, VGS = 0 V,
V
DS
f = 1 MHz
Gate Resistance 0.1 0.7 2.5 Ω
2380 3165 pF
mΩ
®
SyncFET
TM
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g
g
gs
gd
Turn-On Delay Time
Rise Time 510ns
Turn-Off Delay Time 30 48 ns
Fall Time 410ns
Total Gate Charge V
Total Gate Charge V
Gate to Source Charge 6 nC
Gate to Drain “Miller” Charge 6 nC
= 15 V, ID = 19 A,
V
DD
V
= 10 V, R
GS
= 0 V to 10 V
GS
= 0 V to 4.5 V1825nC
GS
GEN
Drain-Source Diode Characteristics
V
= 0 V, IS = 2 A (Note 2) 0.6 0.8
V
SD
t
rr
Q
rr
Notes:
is determined with the devi ce m ount ed on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
1. R
θJA
the user's board design.
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 33 53 nC
a. 53 °C/W when mounted on a
1 in2 pad of 2 oz copper.
GS
= 0 V, IS = 19 A (Note 2) 0.8 1.2
V
GS
= 19 A, di/dt = 300 A/μs
I
F
= 6 Ω
V
DD
I
= 19 A
D
= 15 V,
θJC
11 20 ns
37 52 nC
29 47 ns
is guaranteed by design while R
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
is determined by
θCA
V
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. E
of 66 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = 21 A, VDD = 27 V, VGS = 10 V. 100% tested at L = 3 mH, IAS = 10.2 A.
AS
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
©2011 Fairchild Semiconductor Corporation
FDMC8026S Rev.C3
2
www.fairchildsemi.com
FDMC8026S N-Channel PowerTrench
0.0 0.5 1.0 1.5 2.0
0
20
40
60
80
100
VGS = 4 V
VGS = 3 V
VGS = 4.5 V
VGS = 3.5 V
VGS = 6 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
020406080100
0
1
2
3
4
5
VGS = 4 V
VGS = 3 V
VGS = 6 V
VGS = 3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
I
D
, DRAIN CURRENT (A)
VGS = 4.5 V
V
GS
= 10 V
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
ID = 19 A
V
GS
= 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
T
J
, JUNCTION TE MPERATU R E (
o
C)
246810
0
3
6
9
12
TJ = 125 oC
ID = 19 A
TJ = 25 oC
V
GS
, GATE TO SOURCE VOLTAGE (V)
r
DS(on)
,
DRAIN TO
SOURCE ON-RESISTANCE
(mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
1.0 1.5 2.0 2.5 3.0 3.5 4.0
0
20
40
60
80
100
TJ = 125 oC
V
DS
= 5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
I
D
, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.1
1
10
100
TJ = -55 oC
TJ = 25 oC
TJ = 125 oC
V
GS
= 0 V
I
S
, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Typical Characteristics T
Figure 1.
On Region Characteristics Figure 2.
= 25 °C unless otherwise noted
J
Norma l i z e d O n - Resistance
vs Drain Current and Gate Voltage
®
SyncFET
TM
Fig ure 3. Norm a lized On Re s ista n ce
vs Junction Temperature
©2011 Fairchild Semiconductor Corporation
FDMC8026S Rev.C3
Figure 5. Transfer Characteristics
Figure 4.
On-Resis tance vs Gate to
Source Voltage
Figure 6.
Source to Drain Diode
Forward Voltage vs Source Current
3
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