Fairchild FDMB3900AN service manual

FDMB3900AN

MicroFET 3X1.9

Pin 1

G2

G1

S1

S2

8

1

7

2

3

4

6

5

Q2

Q1

D2
D2

D1

D1

Dual N-Channel Power Trench® MOSFET

25 V, 7.0 A, 23 mΩ

Features

 Max r
 Max r
 Fast switching speed
 Low gate charge
 High performance trench technology for extremely low r
 High power and current handling capability
 RoHS Compliant

= 23 mΩ at VGS = 10 V, ID = 7.0 A

DS(on)

= 33 mΩ at VGS = 4.5 V, ID = 5.5 A

DS(on)

DS(on)

General Description

These N-Channel Logic Level MOSFETs are produced using
Fairchild Semiconductor’s advanced PowerTrench
that has been especially tailored to minimize the on-state
resistance and yet maintain superior switching performance.

These devices are well suited for low voltage and battery
powered applications where the low in-line power loss and fast
switching are required.

TM

December 2011

®

process

FDMB3900AN Dual N-Channel Power Trench

®

MOSFET

TM

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DS

V

GS

I

D

P

D

, T

T

J

STG

Drain to Source Voltage 25 V
Gate to Source Voltage ±20 V
Drain Current -Continuous TA = 25 °C (Note 1a) 7.0

-Pulsed 28
Power Dissipation TA = 25 °C (Note 1a) 1.6
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C

= 25 °C unless otherwise noted

A

= 25 °C (Note 1b) 0.8

A

A

W

Thermal Characteristics

R

θJA

R

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 80
Thermal Resistance, Junction to Ambient (Note 1b) 165

°C/W

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

3900 FDMB3900AN MicroFET 3X1.9 7 ’’ 8 mm 3000 units

©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C1

1

www.fairchildsemi.com

FDMB3900AN Dual N-Channel Power Trench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

ΔBV
ΔT

I

DSS

I

GSS

DSS

DSS
J

Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 25 V
Breakdown Voltage Temperature

Coefficient
Zero Gate Voltage Drain Current VDS = 20 V, V
Gate to Source Leakage Current VGS = ±20 V, V

I

= 250 μA, referenced to 25 °C 17 mV/°C

D

= 0 V 1 μA

GS

= 0 V ±100 nA

DS

On Characteristics

V

GS(th)

ΔV
ΔT

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.0 2.0 3.0 V
Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

I

= 250 μA, referenced to 25 °C -6 mV/°C

D

= 10 V, ID = 7.0 A 19 23

V

GS

V

= 4.5 V, ID = 5.5 A 26 33

GS

= 10 V, ID = 7.0 A

V

GS

T

= 125 °C

J

26 32

Forward Transconductance VDS = 5 V, ID = 7.0 A 27 S

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance
Output Capacitance 151 200 pF
Reverse Transfer Capacitance 141 215 pF

= 13 V, VGS = 0 V

V

DS

f = 1MHz

Gate Resistance 0.8 Ω

650 890 pF

mΩ

®

MOSFET

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

g(TOT)

Q

gs

Q

gd

Turn-On Delay Time
Rise Time 310ns
Turn-Off Delay Time 15 26 ns
Fall Time 310ns
Total Gate Charge VGS = 0 V to 10 V
Total Gate Charge V
Gate to Source Charge 2.0 nC
Gate to Drain “Miller” Charge 3.0 nC

= 13 V, ID = 7.0 A

V

DD

V

= 10 V, R

GS

= 0 V to 5 V 7 10 nC

GS

GEN

Drain-Source Diode Characteristics

V

= 0 V, IS = 1.25 A (Note 2) 0.8 1.2

V

SD

t

rr

Q

rr

NOTES:

1. R

is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

θJA

the user's board design.

Source to Drain Diode Forward Voltage
Reverse Recovery Time

Reverse Recovery Charge 3 10 nC

a. 80 °C/W when mounted on
a 1 in2 pad o f 2 oz c o pper

GS

= 0 V, IS = 7.0 A (Note 2) 0.9 1.2

V

GS

= 7.0 A, di/dt = 100 A/μs

I

F

= 6 Ω

V

DD

I

= 7.0 A

D

= 13 V

612ns

11 17 nC

14 24 ns

is guaranteed by design wh ile R

θJC

b.165 °C/W when mounted on
a minimum pad of 2 oz copper

is determined by

θCA

TM

V

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.

©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C1

2

www.fairchildsemi.com

FDMB3900AN Dual N-Channel Power Trench

01234

0

7

14

21

28

VGS = 6 V

VGS = 3.5 V

VGS = 10 V

VGS = 4 V

PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX

VGS = 4.5 V

I

D

, DRAIN CURRENT (A)

V

DS

, DRAIN TO SOURCE VOLTAGE (V)

0 7 14 21 28

0

1

2

3

4

V

GS

= 6 V

V

GS

= 10 V

PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

I

D

, DRAIN CURRENT(A)

V

GS

= 4 V

VGS = 4.5 V

VGS = 3.5 V

-75 -50 -25 0 25 50 75 100 125 150

0.6

0.8

1.0

1.2

1.4

1.6

ID = 7 A
V

GS

= 10 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTA NC E

T

J

, JUNCTION TEMPERATURE (

o

C)

246810

0

20

40

60

80

ID = 7 A

TJ = 25 oC

TJ = 125 oC

V

GS

, GATE TO SOURCE VO L TA G E (V)

r

DS(on)

,

DRAIN TO

SOURCE ON-RESISTANCE

(mΩ)

PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX

12345

0

7

14

21

28

TJ = 25 oC

TJ = -55 oC

V

DS

= 5 V

PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX

TJ = 150 oC

I

D

, DRAIN CURRENT (A)

VGS, GATE TO SOURC E V OLTAGE (V)

0.2 0.4 0.6 0.8 1.0 1.2 1.4

0.1

1

10

30

TJ = -55 oC

TJ = 25 oC

TJ = 150 oC

V

GS

= 0 V

I

S

, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Typical Characteristics T

Figure 1.

On-Region Characteristics Figure 2.

= 25°C unless otherwise noted

J

Norma l i z e d O n -Resis t a n c e

vs Drain Current and Gate Voltage

®

MOSFET

TM

Figure 3. Normalized On- Resistance

vs Junction Temperature

©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C1

Figure 5. Transfer Characteristics

Figure 4.

On-Resist ance v s Gate to

Source Voltage

Figure 6.

Source to D rain D iode

Forward Voltage vs Source Current

3

www.fairchildsemi.com