Fairchild FDMB2307NZ service manual
FDMB2307NZ
Dual Common Drain N-Channel PowerTrench® MOSFET
20 V, 9.7 A, 16.5 mΩ
Features
Max r
Max r
Max r
Max r
Low Profile - 0.8 mm maximum - in the new package
Micro
HBM ESD protection level > 2 kV (Note 3)
RoHS Compliant
= 16.5 mΩ at VGS = 4.5 V, ID = 8 A
S1S2(on)
= 18 mΩ at VGS = 4.2 V, ID = 7.4 A
S1S2(on)
= 21 mΩ at VGS = 3.1 V, ID = 7 A
S1S2(on)
= 24 mΩ at VGS = 2.5 V, ID = 6.7 A
S1S2(on)
FET 2x3 mm
General Description
This device is designed specifically as a single package solution
for Li-Ion battery pack protection circuit and other ultra-portable
applications. It features two common drain N-channel
MOSFETs, which enables bidirectional current flow, on
Fairchild’s advanced PowerTrench
MicroFET Leadframe, the FDMB2307NZ minimizes both PCB
space and r
S1S2(on)
.
®
Application
Li-Ion Battery Pack
FDMB2307NZ Dual Common Drain N-Channel PowerTrench
October 2011
process with state of the art
Pin 1
Pin 1
D1/D2
Bottom Top
G1S1S1
4
G2
5
S2 S1
6
G2S2S2
3
2
1
MLP 2x3
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
S1S2
V
GS
I
S1S2
P
D
T
J
, T
STG
Source1 to Source2 Voltage 20 V
Gate to Source Voltage (Note 4) ±12 V
Source1 to Source2 Current -Continuous TA = 25°C (Note 1a) 9.7
-Pulsed 40
Power Dissipation TA = 25 °C (Note 1a) 2.2
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
= 25°C unless otherwise noted
A
= 25 °C (Note 1b) 0.8
A
Thermal Characteristics
G1
S1S2
®
MOSFET
A
W
R
θJA
R
θJA
Thermal Resistance, Junction to Ambient(Dual Operation) (Note 1a) 57
Thermal Resistance, Junction to Ambient(Dual Operation) (Note 1b) 161
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
307 FDMB2307NZ MLP 2x3 7’’ 8 mm 3000 units
©2011 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C5
°C/W
1
www.fairchildsemi.com
FDMB2307NZ Dual Common Drain N-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
I
S1S2
I
GSS
Zero Gate Voltage Source1 to Source2
Current
Gate to Source Leakage Current VGS = 12 V, V
V
S1S2
= 16 V, V
S1S2
= 0 V 1 μA
GS
= 0 V 10 μA
On Characteristics
V
GS(th)
r
S1S2(on)
g
FS
Gate to Source Threshold Voltage VGS = V
V
= 4.5 V, I
GS
= 4.2 V, I
V
GS
= 3.1 V, I
V
Static Source1 to Source2 On Resistance
Forward Transconductance V
GS
= 2.5 V, I
V
GS
= 4.5 V, I
V
GS
T
= 125 °C
J
S1S2
= 5 V, I
S1S2
, I
= 250 μA0.611.5V
S1S2
= 8 A 10.5 13.5 16.5
S1S2
= 7.4 A 11 14 18
S1S2
= 7 A 11.5 16 21
S1S2
= 6.7 A 12 18 24
S1S2
= 8 A,
S1S2
= 8 A 41 S
S1S2
11 20 29
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 229 345 pF
Reverse Transfer Capacitance 211 320 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g
g
gs
gd
Turn-On Delay Time
Rise Time 19 34 ns
Turn-Off Delay Time 32 51 ns
Fall Time 9.5 17 ns
Total Gate Charge VGS = 0 V to 5 V
Total Gate Charge VGS = 0 V to 4.5 V 18 25 nC
Gate to Source Charge 2.8 nC
Gate to Drain “Miller” Charge 5.3 nC
= 10 V, VGS = 0 V,
V
S1S2
f = 1 MHz
V
V
S1S2
GS
= 10 V, I
= 4.5 V, R
S1S2
GEN
= 8 A,
= 6 Ω
V
S1S2
I
S1S2
= 10 V,
= 8 A
1760 2640 pF
12 22 ns
20 28 nC
mΩ
®
MOSFET
Source1- Source2 Diode Characteristics
I
fss
V
fss
NOTES:
1. R
is determined with the devi ce m ount ed on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJA
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
©2011 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C5
Maximum Continuous Source1-Source2 Diode Forward Current 8 A
V
Source1 to Source2 Diode Forward Voltage
a. 57 °C/W when mounted on
2
a 1 in
pad of 2 oz copper
= 0 V, V
G1S 1
I
= 8 A (Note 2)
fss
2
G2S2
= 4.5 V,
0.8 1.2 V
is guaranteed by design while R
θJC
b. 161 °C/W when mounted on
a minimum pad of 2 oz copper
is determined by
θCA
www.fairchildsemi.com
FDMB2307NZ Dual Common Drain N-Channel PowerTrench
0.0 0.2 0.4 0.6 0.8
0
10
20
30
40
V
G1S1
= 2.5 V
V
G1S1
= 4.2 V
V
G1S1
= 3.1 V
PULSE DURA TION = 80 μs
DUTY CYCLE = 0.5% MAX
V
G2S2
= 4.5 V
V
G1S1
= 4.5 V
I
S1S2
, SOURCE1 TO SOURCE2 CURRENT (A)
V
S1S2
, SOURCE1 TO SOURCE2 VOLTAGE (V)
0.0 0.2 0.4 0.6 0.8
0
10
20
30
40
VGS = 3.1 V
VGS = 2.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 4.2 V
VGS = 4.5 V
I
S1S2
, SOURCE1 TO SOURCE2 CURRENT (A)
V
S1S2
, SOURCE1 TO SOURCE2 VOLTAGE (V)
0 10203040
0.5
1.0
1.5
V
G1S1
= 4.2 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
V
G2S2
= 4.5 V
NORMALIZED
SOURCE1 TO SOURCE2 ON-RESISTANCE
I
S1S2
, SOURCE1 TO SOURCE2 CURRENT (A)
V
G1S1
= 2.5 V
V
G1S1
= 4.5 V
V
G1S1
= 3.1 V
0 10203040
0.5
1.0
1.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
SOURCE1 TO SOURCE2 ON-RESISTANCE
I
S1S2
, SOURCE1 TO SOURCE2 CURRENT (A)
V
GS
= 2.5 V
VGS = 4.5 V
VGS = 3.1 V
V
GS
= 4.2 V
-50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
I
S1S2
= 8 A
V
GS
= 4.5 V
NORMALIZED
SOURCE1 TO SOURCE2 ON-RE SIST A NCE
T
J
, JUNCTION TEMPERATURE (
o
C)
1.01.52.02.53.03.54.04.5
0
20
40
60
80
TJ = 150 oC
I
S1S2
= 8 A
TJ = 25 oC
V
GS
, GATE TO SOURCE VO L TAGE (V)
r
S1S2(on)
,
SOURCE1 TO
SOURCE2 ON-RESISTANCE
(mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
Typical Characteristics T
Figure 1.
On-Region Characteristics Figure 2.
= 25°C unless otherwise noted
J
On-Region Ch a r a c t e r i s t ics
Figu r e 3 . Nor m a l i zed O n - Resis t a n ce
s Drain Current and Gate Voltage
v
©2011 Fairchild Semiconductor Corporation
FDMB2307NZ Rev.C5
Figur e 5. Norm aliz ed On Res istance
vs Junction Temperature
®
MOSFET
vs Drain Current and Gate Voltage
Figure 6.
Figure 4.
Norm a l i zed O n - R e sist a n c e
On Resis tance vs Gat e to
Source Voltage
3
www.fairchildsemi.com
Loading...