Fairchild FDMA8878 service manual
FDMA8878
D
D
S
G
D
D
Pin 1
Drain
Source
MicroFET 2X2 (Bottom View)
Bottom Drain Contact
D
D
D
D
S
G
Single N-Channel Power Trench® MOSFET
30 V, 9.0 A, 16 mΩ
Features
Max r
Max r
High performance trench technology for extremely low r
Fast switching speed
RoHS Compliant
= 16 mΩ at VGS = 10 V, ID = 9.0 A
DS(on)
= 19 mΩ at VGS = 4.5 V, ID = 8.5 A
DS(on)
DS(on)
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench
been optimized for
Application
DC/DC Buck Converters
Load Switch in NB
Notebook Battery Power Management
r
, switching performance.
DS(on)
May 2012
®
process that has
FDMA8878 Single N-Channel Power Trench
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
P
D
, T
T
J
STG
Thermal Characteristics
R
θJA
θJA
Package Marking and Ordering Information
©2012 Fairchild Semiconductor Corporation
FDMA8878 Rev.C
Device Marking Device Package Reel Size Tape Width Quantity
Drain to Source Voltage 30 V
Gate to Source Voltage (Note 3) ±20 V
Drain Current -Continuous (Package Limited) TC = 25 °C 10
-Pulsed 40
Power Dissipation TA = 25 °C (Note 1a) 2.4
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
Thermal Resistance, Junction to Ambient (Note 1a) 52
Thermal Resistance, Junction to Ambient (Note 1b) 145R
878 FDMA8878 MicroFET 2x2 7 ’’ 12 mm 3000 units
= 25 °C unless otherwise noted
A
= 25 °C (Note 1a) 9.0
A
= 25 °C (Note 1b) 0.9
A
A -Continuous T
W
°C/W
1
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FDMA8878 Single N-Channel Power Trench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV
ΔT
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 30 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 24 V, V
Gate to Source Leakage Current, Forward VGS = 20 V, V
I
= 250 μA, referenced to 25 °C 26 mV/°C
D
= 0 V 1 μA
GS
= 0 V 100 nA
DS
On Characteristics
V
GS(th)
ΔV
ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.2 1.8 3.0 V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 μA, referenced to 25 °C -5 mV/°C
D
V
= 10 V, ID = 9.0 A 13 16
GS
= 4.5 V, ID = 8.5 A 16 19
GS
= 10 V, ID = 9.0 A, TJ = 125 °C 17 21
V
GS
Forward Transconductance VDD = 5 V, ID = 9.0 A 41 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 172 230 pF
Reverse Transfer Capacitance 24 35 pF
= 15 V, VGS = 0 V,
V
DS
f = 1 MHz
Gate Resistance 1.3 Ω
539 720 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time 210ns
Turn-Off Delay Time 14 25 ns
= 15 V, ID = 9.0 A,
V
DD
V
= 10 V, R
GS
GEN
= 6 Ω
Fall Time 210ns
Total Gate Charge VGS = 0 V to 10 V
Total Gate Charge V
Total Gate Charge 1.6 nC
= 0 V to 4.5 V 4.1 5.8 nC
GS
V
DD
I
= 9.0 A
D
= 15 V
Gate to Drain “Miller” Charge 1.2 nC
612ns
8.5 12 nC
mΩV
®
MOSFET
Drain-Source Diode Characteristics
V
= 0 V, IS = 2.0 A (Note 2) 0.75 1.2
V
SD
t
rr
Q
rr
NOTES:
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
1. R
θJA
R
is guaranteed by design while R
θJC
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
©2012 Fairchild Semiconductor Corporation
FDMA8878 Rev. C
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 4 10 nC
is determined by the user's board design.
θCA
a. 52 °C/W when mounted
on a 1 in2 pad of 2 oz copper.
SS
SF
DS
DF
G
GS
= 0 V, IS = 9.0 A (Note 2) 0.86 1.2
V
GS
= 9.0 A, di/dt = 100 A/μs
I
F
G
2
DF
DS
SF
16 28 ns
b. 145 °C/W when mounted on a
minimum pad of 2 oz copper.
SS
V
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