Fairchild FDMA7672 service manual

D
D
S
G
D
D
Pin 1
Drain
Source
MicroFET 2X2 (Bottom View)
Bottom Drain Contact
D
D
D
D
S
G
Single N-Channel PowerTrench® MOSFET
30 V, 9 A, 21 mΩ Features
Max rMax rLow Profile - 0.8 mm maximum - in the new package
MicroFET 2x2 mm
Free from halogenated compounds and antimony oxidesRoHS compliant
= 21 mΩ at VGS = 10 V, ID = 9 A
DS(on)
= 32 mΩ at VGS = 4.5 V, ID = 7 A
DS(on)
General Description
This device has been designed to provide maximum efficiency and thermal performance for synchronous buck converters. The low r performance.
and gate charge provide excellent switching
DS(on)
Application
DC – DC Buck Converters
FDMA7672 Single N-Channel Power Trench
April 2012
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
, T
T
J
STG
Thermal Characteristics
R
θJC θJA
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
©2012 Fairchild Semiconductor Corporation FDMA7672 Rev.C5
Drain to Source Voltage 30 V Gate to Source Voltage ±20 V Drain Current -Continuous TA = 25 °C (Note 1a) 9
-Pulsed 24 Power Dissipation TA = 25 °C (Note 1a) 2.4 Power Dissipation T Operating and Storage Junction Temperature Range –55 to +150 °C
Thermal Resistance, Junction to Case 6.9 Thermal Resistance, Junction to Ambient (Note 1a) 52 Thermal Resistance, Junction to Ambient (Note 1b) 145
672 FDMA7672 MicroFET 2x2 7 ’’ 12 mm 3000 units
= 25 °C unless otherwise noted
A
= 25 °C (Note 1b) 0.9
A
1
A
W
°C/WR
www.fairchildsemi.com
FDMA7672 Single N-Channel Power Trench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV ΔT
I
DSS
I
GSS
DSS
DSS J
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 30 V Breakdown Voltage Temperature
Coefficient Zero Gate Voltage Drain Current VDS = 24 V, V Gate to Source Leakage Current VGS = 20 V, V
I
= 250 μA, referenced to 25 °C 16 mV/°C
D
= 0 V 1 μA
GS
= 0 V 100 nA
DS
On Characteristics
V
GS(th)
ΔV ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.0 2.1 3.0 V Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 μA, referenced to 25 °C –6 mV/°C
D
V
= 10 V, ID = 9 A 14 21
GS
= 4.5 V, ID = 7 A 20 32
GS
= 10 V, ID = 9 A, TJ = 125 °C 19 28
V
GS
Forward Transconductance VDS = 5 V, ID = 9 A 35 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance Output Capacitance 195 260 pF Reverse Transfer Capacitance 25 40 pF Gate Resistance 1.5 Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q Q Q Q
g g gs gd
Turn-On Delay Time Rise Time 210ns Turn-Off Delay Time 14 25 ns Fall Time 210ns Total Gate Charge VGS = 0 V to 10 V Total Gate Charge VGS = 0 V to 4.5 V 4.4 6 nC Gate to Source Gate Charge 1.9 nC Gate to Drain “Miller” Charge 1.5 nC
= 15 V, VGS = 0 V
V
DS
f = 1.0 MHz
= 15 V, ID = 9 A
V
DD
V
= 10 V, R
GS
GEN
= 6 Ω
V I
D
DD
= 9 A
= 15 V,
570 760 pF
612ns
9.3 13 nC
mΩV
®
MOSFET
Drain-Source Diode Characteristics
I
S
V
SD
t
rr
Q
rr
NOTES:
1. R
is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJA
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
©2012 Fairchild Semiconductor Corporation FDMA7672 Rev.C5
Maximum Continuous Drain-Source Diode Forward Current 2 A Source to Drain Diode Forward Voltage V Reverse Recovery Time Reverse Recovery Charge 5 10 nC
GS
= 9 A, di/dt = 100 A/μs
I
F
a. 52 °C/W when mounted on a 1 in2 pad of 2 oz copper.
= 0 V, IS = 2 A (Note 2) 0.8 1.2 V
18 32 ns
is guaranteed by design while R
θJC
b. 145 °C/W when mounted on a minimum pad of 2 oz copper.
2
is determined by
θCA
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