Fairchild FDMA6023PZT service manual

FDMA6023PZT

Dual P-Channel PowerTrench® MOSFET

-20 V, -3.6 A, 60 mΩ

Features

 Max r
 Max r
 Max r
 Max r
 Low Profile-0.55 mm maximum - in the new package

MicroFET 2x2 mm Thin

 HBM ESD protection level > 2.4 kV typical (Note 3)
 RoHS Compliant

 Free from halogenated compounds and antimony oxides

= 60 mΩ at VGS = -4.5 V, ID = -3.6 A

DS(on)

= 80 mΩ at VGS = -2.5 V, ID = -3.0 A

DS(on)

= 110 mΩ at VGS = -1.8 V, ID = -2.0 A

DS(on)

= 170 mΩ at VGS = -1.5 V, ID = -1.0 A

DS(on)

General Description

This device is designed specifically as a single package solution
for the battery charge switch in cellular handset and other
ultraportable applications. It features two independent
P-Channel MOSFETs with low on-state resistance for minimum
conduction losses. When connected in the typical common
source configuration, bi-directional current flow is possible.

The MicroFET 2X2 Thin package offers exceptional thermal
performance for it’s physical size and is well suited to linear
mode applications.

Applications

 Battery protection
 Battery management
 Load switch

June 2009

FDMA6023PZT Dual P-Channel PowerTrench

®

MOSFET

Pin 1

MicroFET 2x2

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DS

V

GS

I

D

P

D

, T

T

J

STG

Drain to Source Voltage -20 V
Gate to Source Voltage ±8 V

-Continuous TA = 25 °C (Note 1a) -3.6

-Pulsed -15
Power Dissipation TA = 25 °C (Note 1a) 1.4
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C

S1 G1 D2

D1 D2

D1 G2

A

S2

= 25 °C unless otherwise noted

= 25 °C (Note 1b) 0.7

A

S1

G1

D2

Q1

1

2

3

Q2

6

D1

G2

5

4

S2

Thermal Characteristics

R

θJA

R

θJA

R

θJA

R

θJA

Thermal Resistance for Single Operation, Junction to Ambient (Note 1a) 86
Thermal Resistance for Single Operation, Junction to Ambient (Note 1b) 173
Thermal Resistance for Dual Operation, Junction to Ambient (Note 1c) 69
Thermal Resistance for Dual Operation, Junction to Ambient (Note 1d) 151

Package Marking and Ordering Information

A

W

°C/W

Device Marking Device Package Reel Size Tape Width Quantity

623 FDMA6023PZT MicroFET 2X2 Thin 7 ’’ 8mm 3000 units

©2009 Fairchild Semiconductor Corporation
FDMA6023PZT Rev.B1

1

www.fairchildsemi.com

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

∆BV
∆T

I

DSS

I

GSS

DSS

DSS
J

Drain to Source Breakdown Voltage ID = -250 µA, VGS = 0 V -20 V
Breakdown Voltage Temperature

Coefficient
Zero Gate Voltage Drain Current VDS = -16 V, V
Gate to Source Leakage Current VGS = ±8 V, V

ID = -250 µA, referenced to 25 °C -12 mV/°C

= 0 V -1 µA

GS

= 0 V ±10 µA

DS

FDMA6023PZT Dual P-Channel PowerTrench

On Characteristics

V

GS(th)

∆V
∆T

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage VGS = VDS, ID = -250 µA -0.4 -0.5 -1.5 V
Gate to Source Threshold Voltage

Temperature Coefficient

Drain to Source On Resistance

Forward Transconductance VDD = -5 V, ID = -3.6 A 15 S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance 115 155 pF
Reverse Transfer Capacitance 100 150 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q
Q
Q

g
gs
gd

Turn-On Delay Time
Rise Time 11 20 ns
Turn-Off Delay Time 75 120 ns
Fall Time 47 75 ns
Total Gate Charge V
Gate to Source Charge 1.4 nC
Gate to Drain “Miller” Charge 5.2 nC

ID = -250 µA, referenced to 25 °C -2.7 mV/°C
VGS = -4.5 V, ID = -3.6 A 40 60

VGS = -2.5 V, ID = -3.0 A 49 80
VGS = -1.8 V, ID = -2.0 A 60 110
VGS = -1.5 V, ID = -1.0 A 70 170
VGS = -4.5 V, ID = -3.6 A,

TJ = 125 °C

VDS = -10 V, VGS = 0 V,

58 72

665 885 pF

mΩ

f = 1 MHz

13 23 ns

VDD = -10 V, ID = -3.6 A,
VGS = -4.5 V, R

= 0 V to -4.5 V

GS

= 6 Ω

GEN

VDD = -10 V,

12 17 nC

ID = -3.6 A

®

MOSFET

Drain-Source Diode Characteristics

I

S

V

SD

t

rr

Q

rr

©2009 Fairchild Semiconductor Corporation
FDMA6023PZT Rev.B1

Maximum Continuous Drain-Source Diode Forward Current -1.1 A
Source to Drain Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge 15 27 nC

= 0 V, IS = -1.1 A (Note 2) -0.7 -1.2 V

GS

IF = -3.6 A, di/dt = 100 A/µs

2

33 53 ns

www.fairchildsemi.com

FDMA6023PZT Dual P-Channel PowerTrench

Electrical Characteristics T

Notes:

1. R

is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 i n. board of FR-4 material. R

θJA

user's board design.
(a) R
(b) R
(c) R
(d) R

2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.

3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.

= 86 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For single operation.

θJA

= 173 °C/W when mounted on a minimum pad of 2 oz copper. For single operation.

θJA

= 69 °C/Wwhen mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For dual operation.

θJA

= 151 °C/W when mounted on a minimum pad of 2 oz copper. For dual operation.

θJA

a) 86oC/W when
mounted on a
1in2 pad of 2 oz
copper.

= 25 °C unless otherwise noted

J

b)173oC/W
when mounted
on a minimum
pad of 2 oz
copper.

is guaranteed by design while R

θJC

o

C/W when

c) 69
mounted on a

2

1in

pad of 2 oz

copper.

is determined by the

θJA

d)151oC/W
when mounted
on a minimum
pad of 2 oz
copper.

®

MOSFET

©2009 Fairchild Semiconductor Corporation
FDMA6023PZT Rev.B1

3

www.fairchildsemi.com