Fairchild FDMA3028N service manual

FDMA3028N

G2

S1

G1

D2

D1

S2

S1 G1 D2

S2

MicroFET 2x2

D1 G2

PIN 1

D1 D2

1

2

3

6

5

4

Top Bottom

Dual N-Channel PowerTrench® MOSFET

30 V, 3.8 A, 68 mΩ
Features

 Max r
 Max r
 Max r
 Low profile - 0.8 mm maximum - in the new package

MicroFET 2x2 mm

 RoHS Compliant

= 68 mΩ at VGS = 4.5 V, ID = 3.8 A

DS(on)

= 88 mΩ at VGS = 2.5 V, ID = 3.4 A

DS(on)

= 123 mΩ at VGS = 1.8 V, ID = 2.9 A

DS(on)

General Description

This device is designed specifically as a single package solution
for dual switching requirements in cellular handset and other
ultra-portable applications. It features two independent
N-Channel MOSFETs with low on-state resistance for minimum
conduction losses. The MicroFET 2x2 package offers
exceptional thermal performance for its physical size and is well
suited to linear mode applications.

FDMA3028N Dual N-Channel PowerTrench

June 2011

®

MOSFET

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DS

V

GS

I

D

P

D

, T

T

J

STG

Thermal Characteristics

R

θJA

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

©2011 Fairchild Semiconductor Corporation
FDMA3028N Rev.C2

Drain to Source Voltage 30 V
Gate to Source Voltage ±12 V
Drain Current -Continuous (Note 1a) 3.8

-Pulsed 16
Power Dissipation (Note 1a) 1.5
Power Dissipation (Note 1b) 0.7
Operating and Storage Junction Temperature Range -55 to +150 °C

Thermal Resistance for Single Operation, Junction to Ambient (Note 1a) 86
Thermal Resistance for Single Operation, Junction to Ambient (Note 1b) 173
Thermal Resistance for Dual Operation, Junction to Ambient (Note 1c) 69
Thermal Resistance for Dual Operation, Junction to Ambient (Note 1d) 151
Thermal Resistance for Single Operation, Junction to Ambient (Note 1e) 160
Thermal Resistance for Dual Operation, Junction to Ambient (Note 1f) 133

328 FDMA3028N MicroFET 2X2 7 ’’ 8 mm 3000 units

= 25 °C unless otherwise noted

A

1

A

W

°C/W

www.fairchildsemi.com

FDMA3028N Dual N-Channel PowerTrench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

ΔBV
ΔT

I

DSS

I

GSS

DSS

DSS
J

Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 30 V
Breakdown Voltage Temperature

Coefficient
Zero Gate Voltage Drain Current VDS = 24 V, V
Gate to Source Leakage Current VGS = ±12 V, V

I

= 250 μA, referenced to 25 °C 23 mV/°C

D

= 0 V 1 μA

GS

= 0 V ±100 nA

DS

On Characteristics

V

GS(th)

ΔV
ΔT

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 0.6 0.9 1.5 V
Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

I

= 250 μA, referenced to 25 °C -3 mV/°C

D

= 4.5 V, ID = 3.8 A 46 68

V

GS

V

= 2.5 V, ID = 3.4 A 56 88

GS

= 1.8 V, ID = 2.9 A 80 123

V

GS

= 4.5 V, ID = 3.8 A, TJ = 125 °C 72 108

V

GS

Forward Transconductance VDS = 5 V, ID = 3.8 A 15 S

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance
Output Capacitance 40 55 pF
Reverse Transfer Capacitance 29 45 pF

= 15 V, VGS = 0 V,

V

DS

f = 1 MHz

Gate Resistance 2.4 Ω

282 375 pF

mΩ

®

MOSFET

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

g(TOT)

Q

gs

Q

gd

Turn-On Delay Time
Rise Time 310ns
Turn-Off Delay Time 15 27 ns
Fall Time 2.5 10 ns
Total Gate Charge
Gate to Source Charge 0.4 nC
Gate to Drain “Miller” Charge 1 nC

Drain-Source Diode Characteristics

V

SD

t

rr

Q

rr

Source to Drain Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge 3.3 10 nC

5.3 11 ns

= 15 V, ID = 3.8 A,

V

DD

V

= 4.5 V, R

GS

= 15 V, ID = 3.8 A

V

DD

V

= 5 V

GS

= 0 V, IS = 1.3 A (Note 2) 0.7 1.2 V

GS

= 3.8 A, di/dt = 100 A/μs

I

F

GEN

= 6 Ω

3.7 5.2 nC

12 22 ns

©2011 Fairchild Semiconductor Corporation
FDMA3028N Rev.C2

2

www.fairchildsemi.com

FDMA3028N Dual N-Channel PowerTrench

Electrical Characteristics T

Notes:

1. R

is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

θJA

user's board design.
(a) R

(b) R
(c) R

(d) R
(e) R
(f) R

= 86 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For single operation.

θJA

= 173 °C/W when mounted on a minimum pad of 2 oz copper. For single operation.

θJA

= 69 oC/W when mounted on a 1 in

θJA

= 151 oC/W when mounted on a minimum pad of 2 oz copper. For dual operation.

θJA

= 160 oC/W when mounted on a 30mm2 pad of 2 oz copper. For single operation.

θJA

= 133 oC/W when mounted on a 30mm2 pad of 2 oz copper. For dual operation.

θJA

= 25 °C unless otherwise noted

J

2

pad of 2 oz copper, 1.5 ” x 1.5 ” x 0.062 ” thick PCB. For dual operation.

a. 86 °C/W when mounted on

2

a 1 in

pad of 2 oz copper

c. 69 °C/W when mounted on

2

a 1 in

pad of 2 oz copper

is guaranteed by design while R

θJC

b. 173 °C/W when mounted on
a minimum pad of 2 oz copper

d. 151 °C/W when mounted on
a minimum pad of 2 oz copper

is determined by the

θJA

®

MOSFET

e. 160 °C/W when mounted on
30mm

2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0%

2

pad of 2 oz copper

f. 133 °C/W when mounted on
30mm2 of 2 oz copper

©2011 Fairchild Semiconductor Corporation
FDMA3028N Rev.C2

3

www.fairchildsemi.com