Fairchild FDMA1029PZ service manual
FDMA1029PZ
Dual P-Channel PowerTrench MOSFET
May 2009
tm
FDMA1029PZ Dual P-Channel PowerTrench
tm
General Description
This device is designed specifically as a single package
solution for the battery charge switch in cellular handset
and other ultra-portable applications. It features two
independent P-Channel MOSFETs with low on-state
resistance for minimum conduction losses. When
connected in the typical common source configuration,
bi-directional current flow is possible.
The MicroFET 2x2 package offers exceptional thermal
performance for its physical size and is well suited to
linear mode applications.
PIN 1
S1 G1 D2
D1 D2
D1 G2 S2
MicroFET 2x2
Features
x –3.1 A, –20V. R
R
x Low profile – 0.8 mm maximum – in the new package
MicroFET 2x2 mm
x HBM ESD protection level > 2.5kV (Note 3)
x RoHS Compliant
Free from halogenated compounds and antimony
oxides
S1
1
2
G1
3
D2
= 95 m: @ VGS = –4.5V
DS(ON)
= 141 m: @ VGS = –2.5V
DS(ON)
6
5
4
D1
G2
S2
MOSFET
Absolute Maximum Ratings T
o
=25
C unless otherwise noted
A
Symbol Parameter Ratings Units
VDS Drain-Source Voltage –20 V
VGS Gate-Source Voltage
ID
PD
TJ, T
STG
Drain Current – Continuous (Note 1a) –3.1
– Pulsed –6
Power Dissipation for Single Operation (Note 1a) 1.4
Operating and Storage Junction Temperature Range –55 to +150
(Note 1b)
r12
0.7
V
A
W
qC
Thermal Characteristics
R
TJA
R
TJA
R
TJA
R
TJA
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
(Note 1a) 86 (Single Operation)
(Note 1b) 173 (Single Operation)
(Note 1c) 69 (Dual Operation)
(Note 1d) 151 (Dual Operation)
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
029 FDMA1029PZ 7’’ 8mm 3000 units
2009 Fairchild Semiconductor Corpora tion
FDMA1029PZ Rev.B3(W)
qC/W
FDMA1029PZ Dual P-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
'BVDSS
'T
J
I
Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1
DSS
I
Gate–Body Leakage VGS = ± 12 V, VDS = 0 V ±10
GSS
Breakdown Voltage Temperature
Coefficient
= 0 V, ID = –250 PA
V
GS
I
= –250 PA, Referenced to 25qC
D
–20 V
–12
mV/qC
PA
PA
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
'VGS(th)
'TJ
R
DS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
= VGS, ID = –250 PA
V
DS
I
= –250 PA, Referenced to 25qC
D
VGS = –4.5 V, ID = –3.1 A
V
= –2.5 V, ID = –2.5 A
GS
= –4.5 V, ID = –3.1 A, TJ=125qC
V
GS
gFS Forward Transconductance VDS = –10 V, ID = –3.1 A –11 S
–0.6 –1.0 –1.5 V
95
141
140
mV/qC
m:
4
60
88
87
Dynamic Characteristics
C
Input Capacitance 540 pF
iss
C
Output Capacitance 120 pF
oss
C
Reverse Transfer Capacitance
rss
V
= –10 V, V
DS
f = 1.0 MHz
= 0 V,
GS
100 pF
Switching Characteristics (Note 2)
= –10 V, ID = –1 A,
t
Turn–On Delay Time 13 24 ns
d(on)
tr Turn–On Rise Time 11 20 ns
t
Turn–Off Delay Time 37 59 ns
d(off)
tf Turn–Off Fall Time
Qg Total Gate Charge 7.0 10 nC
Qgs Gate–Source Charge 1.1 nC
Qgd Gate–Drain Charge
V
DD
= –4.5 V, R
V
GS
= –10 V, ID = –3.1 A,
V
DS
V
= –4.5 V
GS
GEN
= 6 :
36 58 ns
2.4 nC
MOSFET
Drain–Source Diode Characteristics and Maximum Ratings
I
Maximum Continuous Source–Drain Diode Forward Current -1.1 A
S
VSD Source–Drain Diode Forward
trr Diode Reverse Recovery Time 25 ns
Qrr Diode Reverse Recovery Charge
Voltage
V
= 0 V, IS = –1.1 A (Note 2) –0.8 –1.2 V
GS
I
= –3.1 A,
F
dI
/dt = 100 A/µs
F
9 nC
FDMA1029PZ Rev.B3(W)
Notes:
1. R
is determined with the device mou nted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
TJA
user's board design.
(a) R
(b) R
(c) R
(d) R
= 86 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For single operation.
TJA
= 173 °C/W when mounted on a minimum pad of 2 oz copper. For single operation.
TJA
= 69 oC/W when mounted on a 1 in2pad of 2 oz copper, 1.5 ” x 1.5 ” x 0.062 ” thick PCB. For dual operation.
TJA
= 151 oC/W when mounted on a minimum pad of 2 oz copper. For dual operation.
TJA
o
C/W when
a)86 oC/W when
mounted on a 1
2
in
pad of 2 oz
copper.
b)173
mounted on a
minimum pad of 2
oz copper.
is guaranteed by design while R
TJC
o
C/W when
c)69
mounted on a 1 in
pad of 2 oz copper.
2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0%
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
is determined by the
TJA
o
d)151
C/W when
2
mounted on a
minimum pad of 2 oz
copper.
FDMA1029PZ Rev.B3(W)
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