Fairchild FDMA1024NZ service manual
FDMA1024NZ
Dual N-Channel PowerTrench
20 V, 5.0 A, 54 mΩ
Features
Max r
Max r
Max r
Max r
HBM ESD protection level = 1.6 kV (Note 3)
Low profile - 0.8 mm maximum - in the new package
MicroFET 2x2 mm
RoHS Compliant
Free from halogenated compounds and antimony
oxides
= 54 mΩ at VGS = 4.5 V, ID = 5.0 A
DS(on)
= 66 mΩ at VGS = 2.5 V, ID = 4.2 A
DS(on)
= 82 mΩ at VGS = 1.8 V, ID = 2.3 A
DS(on)
= 114 mΩ at VGS = 1.5 V, ID = 2.0 A
DS(on)
®
MOSFET
General Description
This device is designed specifically as a single package solution
for dual switching requirements in cellular handset and other
ultr
N-Channel MOSFETs wi
conduction losses.
The MicroFET 2X2 package offers exceptional thermal
performance for its physical size and is well suited to linear mo de
applications.
Applications
Baseband Switch
Loadswitch
DC-DC Conversion
a-portable applications. It features two
FDMA1024NZ Dual N-Channel Power Trench
May 2010
independent
th low on-state resistance for minimum
®
MOSFET
PIN 1
MicroFET 2x2
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
P
D
, T
T
J
STG
Drain to Source Voltage 20 V
Gate to Source Voltage ±8 V
Drain Current -Continuous (Note 1a) 5.0
-Pulsed 6.0
Power Dissipation (Note 1a) 1.4
Power Dissipation (Note 1b) 0.7
Operating and Storage Junction Temperature Range –55 to +150 °C
S1 G1 D2
D1 D2
D1 G2
= 25 °C unless otherwise noted
A
S2
S1
G1
D2
1
2
3
6
5
4
Thermal Characteristics
R
θJA
R
θJA
R
θJA
R
θJA
Thermal Resistance, Junction to Ambient (Note 1a) 86 (Single Operation)
Thermal Resistance, Junction to Ambient (Note 1b) 173 (Single Operation)
Thermal Resistance, Junction to Ambient (Note 1c) 69 (Dual Operation)
Thermal Resistance, Junction to Ambient (Note 1d) 151 (Dual Operation)
Package Marking and Ordering Information
D1
G2
S2
A
W
°C/W
Device Marking Device Package Reel Size Tape Width Quantity
024 FDMA1024NZ MicroFET 2X2 7 ” 8 mm 3000 units
©2010 Fairchild Semiconductor Corporation
FDMA1024NZ Rev.B4
1
www.fairchildsemi.com
FDMA1024NZ Dual N-Channel Power Trench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
∆BV
∆T
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage ID = 250 µA, VGS = 0 V 20 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 16 V, V
Gate to Source Leakage Current VGS = ±8 V, V
I
= 250 µA, referenced to 25 °C 19 mV/°C
D
= 0 V 1 µA
GS
= 0 V ±10 µA
DS
On Characteristics
V
GS(th)
∆V
∆T
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 µA 0.4 0.7 1.0 V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On-Resistance
= 250 µA, referenced to 25 °C -3 mV/°C
I
D
V
= 4.5 V, ID = 5.0 A 37 54
GS
= 2.5 V, ID = 4.2 A 43 66
V
GS
= 1.8 V, ID = 2.3 A 52 82
V
GS
= 1.5 V, ID = 2.0 A 67 114
V
GS
= 4.5 V, ID = 5.0 A, TJ = 125 °C 51 75
V
GS
Forward Transconductance VDD = 5 V, ID = 5.0 A 16 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance
Output Capacitance 70 95 pF
Reverse Transfer Capacitance 40 65 pF
= 10 V, VGS = 0 V,
V
DS
f = 1 MHz
Gate Resistance f = 1 MHz 4.3 Ω
375 500 pF
mΩ
®
MOSFET
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time
Rise Time 2.2 10 ns
Turn-Off Delay Time 18 33 ns
Fall Time 2.3 10 ns
Total Gate Charge
Gate to Source Gate Charge 0.6 nC
Gate to Drain “Miller” Charge 0.9 nC
Drain-Source Diode Characteristics
I
S
V
SD
t
rr
Q
rr
Maximum Continuous Source-Drain Diode Forward Current
Source to Drain Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge 5 10 nC
5.3 11 ns
V
= 10 V, ID = 5.0 A
DD
= 4.5 V, R
V
GS
V
= 4.5 V, VDD = 10 V,
GS
= 5.0 A
I
D
GEN
= 6 Ω
5.2 7.3 nC
1.1
= 0 V, IS = 1.1 A (Note 2) 0.7 1.2 V
GS
= 5.0 A, di/dt = 100 A/µs
I
F
19 35 ns
A
©2010 Fairchild Semiconductor Corporation
FDMA1024NZ Rev.B4
2
www.fairchildsemi.com
Notes:
1. R
is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJA
user's board design.
(a) R
(b) R
(c) R
(d) R
= 86 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For single operation.
θJA
= 173 °C/W when mounted on a minimum pad of 2 oz copper. For single operation.
θJA
= 69 oC/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 ” x 1.5 ” x 0.062 ” thick PCB. For dual operation.
θJA
= 151 oC/W when mounted on a minimum pad of 2 oz copper. For dual operation.
θJA
is guaranteed by design while R
θJC
is determined by the
θJA
FDMA1024NZ Dual N-Channel Power Trench
o
a) 86
C/W when
mounted on a 1
in2 pad of 2 oz
copper.
2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0 %
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
o
b) 173
C/W when
mounted on a
minimum pad of 2
oz copper.
c) 69
mounted on a 1
in2 pad of 2 oz
copper.
o
C/W when
o
d) 151
C/W when
mounted on a
minimum pad of 2
oz copper.
®
MOSFET
©2010 Fairchild Semiconductor Corporation
FDMA1024NZ Rev.B4
3
www.fairchildsemi.com
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