Fairchild FDJ1027P service manual
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November 2004
FDJ1027P
P-Channel 1.8V Specified PowerTrench® MOSFET
FDJ1027P
General Description
This dual P-Channel 1.8V specified MOSFET uses
Fairchild’s advanced low voltage PowerTrench process.
Packaged in FLMP SC75, the R
properties of the device are optimized for battery power
management applications.
and thermal
DS(ON)
Applications
• Battery management/Charger Application
• Load switch
S2
S2
G1
G1
S1
S1
MOSFET Maximum Ratings T
G2
G2
S2
S2
S1
S1
o
=25
C unless otherwise noted
A
Features
• –2.8 A, –20 V R
• Low gate charge, High Power and Current handling
capability
• High performance trench technology for extremely
DS(ON)
low R
• FLMP SC75 package: Enhanced thermal
performance in industry-standard package size
4
5
6
= 160 mΩ @ VGS = –4.5 V
DS(ON)
= 230 mΩ @ VGS = –2.5 V
R
DS(ON)
= 390 mΩ @ VGS = –1.8 V
R
DS(ON)
Bottom Drain Contact
Bottom Drain Contact
3
2
1
Symbol Parameter Ratings Units
V
Drain-Source Voltage –20 V
DSS
V
Gate-Source Voltage
GSS
ID Drain Current – Continuous (Note 1a) –2.8 A
– Pulsed –12
PD
TJ, T
stg
Power Dissipation for Single Operation (Note 1a) 1.5
Operating and Storage Junction Temperature Range –55 to +150
(Note 1b)
±8
0.9
V
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a) 80
5
°C/W
Package Marking and Ordering Information
.G FDJ1027P 7’’ 8mm 3000 units
2004 Fairchild Semiconductor Corporation FDJ1027P Rev C1 (W)
FDJ1027P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source BreakdownVoltage
DSS
∆BVDSS
∆T
J
I
Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1
DSS
I
Gate–Body Leakage VGS = ±8 V, VDS = 0 V ±100 nA
GSS
Breakdown Voltage Temperature
Coefficient
= 0 V, ID = –250 µA
V
GS
I
= –250 µA, Referenced to 25°C
D
–20 V
–13
mV/°C
µA
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
∆VGS(th)
∆TJ
R
DS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
= VGS, ID = –250 µA
V
DS
I
= –250 µA, Referenced to 25°C
D
VGS = –4.5 V, ID = –2.8 A
= –2.5 V, ID = –2.2 A
V
GS
= –1.8 V, ID = –1.7 A
V
GS
= –4.5 V,ID = –2.8 A,TJ=125°C
V
GS
gFS Forward Transconductance VDS = –5 V, ID = –2.8 A 5 S
–0.4 –0.8 –1.5 V
3
108
163
283
150
160
230
390
238
mV/°C
mΩ
Dynamic Characteristics
C
Input Capacitance 290 pF
iss
C
Output Capacitance 55 pF
oss
C
Reverse Transfer Capacitance
rss
Rg Gate Resistance V
= –10 V, VGS = 0 V,
V
DS
f = 1.0 MHz
29 pF
= 15 mV f = 1.0 MHz 18
GS
mΩ
Switching Characteristics (Note 2)
V
t
Turn–On Delay Time 8 16 ns
d(on)
tr Turn–On Rise Time 13 23 ns
t
Turn–Off Delay Time 13 23 ns
d(off)
tf Turn–Off Fall Time
Qg Total Gate Charge 3 4 nC
Qgs Gate–Source Charge 0.65 nC
Qgd Gate–Drain Charge
= –10 V, ID = –1 A,
DD
= –4.5 V, R
V
GS
= –10 V, ID = –2.8 A,
V
DS
= –4.5 V
V
GS
GEN
= 6 Ω
18 32 ns
0.75 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –1.25 A
VSD
trr Diode Reverse Recovery Time 14 ns
Qrr Diode Reverse Recovery Charge
Drain–Source Diode Forward
Voltage
= 0 V, IS = –1.25 A (Note 2) –0.8 –1.2
V
GS
I
= –2.8 A,
F
d
= 100 A/µs
iF/dt
4 nC
V
FDJ1027P Rev C1 (W)
FDJ1027P
Electrical Characteristics T
NOTES:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
a) 80°C/W when
mounted on a 1in2 pad
of 2 oz copper (Single
Operation).
= 25°C unless otherwise noted
A
b) 140°C/W when mounted
on a minimum pad of 2 oz
copper (Single Operation).
FDJ1027P Rev C1 (W)
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