Drain to Source Breakdown Volt ageID = 250µA, VGS = 0V60--V
V
= 50V--1
Zero Gate Voltage Drain Current
DS
= 0VTC = 150oC--250
V
GS
Gate to Source Leakage CurrentVGS = ±20V--±100nA
On Characteristics
V
GS(TH)
r
DS(ON)
Gate to Source Threshold VoltageVGS = VDS, ID = 250µA2-4V
= 80A, VGS = 10V -0.0035 0.0038
I
D
I
= 40A, VGS = 6V -0.0049 0.0074
Drain to Source On Resistance
D
= 80A, VGS = 10V,
I
D
T
= 175oC
J
-0.0071 0.0078
Dynamic Characteristics
C
C
C
Q
Q
Q
Q
Q
ISS
OSS
RSS
g(TOT)
g(TH)
gs
gs2
gd
Input Capacitance
Output Capacitance-1123-pF
Reverse Transfer Capacitance-367-pF
= 25V, VGS = 0V,
V
DS
f = 1MHz
Total Gate Charge at 10VVGS = 0V to 10V
Threshold Gate ChargeVGS = 0V to 2V-1215nC
Gate to Source Gate Charge-26-nC
Gate Charge Threshold to Plateau-15-nC
V
DD
= 80A
I
D
= 1.0mA
I
g
= 30V
Gate to Drain “Miller” Charge-27-nC
-6400-pF
96124nC
µA
Ω
Switching Characteristics
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
Turn-On Time
Turn-On Delay Time-17-ns
Rise Time-144-ns
Tur n-Off Delay Time-34-ns
Fall Time-60-n s
Turn-Off Time--115ns
Note: For further disc ussio n of the PSPI CE model, c onsult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank
Wheatley.
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DEFINITIONS
dentificationProduct StatusDefinition
Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplement ary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I51
FDP038AN06A0 / FDI038AN06A0 Rev. B2
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