tm
FDG8850NZ
Dual N-Channel PowerTrench® MOSFET
30V,0.75A,0.4Ω
FDG8850NZ Dual N-Channel PowerTrench
April 2007
Features
Max r
Max r
Very low level gate drive requirements allowing operation
in 3V circuits(V
Very small package outline SC70-6
RoHS Compliant
= 0.4Ω at VGS = 4.5V, ID = 0.75A
DS(on)
= 0.5Ω at VGS = 2.7V, ID = 0.67A
DS(on)
<1.5V)
GS(th)
G2
D1
SC70-6
Pin 1
S2
D2
G1
S1
General Description
This dual N-Channel logic level enhancement mode field effect
transistors are produced using Fairchild’s proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. This device
has been designed especially for low voltage applications as
a replacement for bipolar digital transistors and small signal
MOSFETs. Since bias resistors are not required, this dual digital
FET can replace several different digital transistors, with differ
ent bias resistor values.
S1
G1
D2
Q1
Q2
D1
G2
S2
-
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
P
D
, T
T
J
STG
Thermal Characteristics
R
θJA
R
θJA
Package Marking and Ordering Information
Device Marking Device Reel Size Tape Width Quantity
©2007 Fairchild Semiconductor Corporation
FDG8850NZ Rev.B
Drain to Source Voltage 30 V
Gate to Source Voltage ±12 V
Drain Current -Continuous 0.75
-Pulsed 2.2
Power Dissipation for Single Operation (Note 1a)
(Note 1b)
Operating and Storage Junction Temperature Range –55 to +150 °C
Thermal Resistance, Junction to Ambient Single operation (Note 1a) 350
Thermal Resistance, Junction to Ambient Single operation (Note 1b) 415
.50 FDG8850NZ 7” 8mm 3000 units
= 25°C unless otherwise noted
A
1
0.36
0.30
A
W
°C/W
www.fairchildsemi.com
FDG8850NZ Dual N-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
ΔBV
DSS
ΔT
J
I
DSS
I
GSS
On Characteristics
V
GS(th)
ΔV
GS(th)
ΔT
J
r
DS(on)
g
FS
Drain to Source Breakdown Voltage ID = 250μA, VGS = 0V 30 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 24V, V
ID = 250μA, referenced to 25°C 25 mV/°C
= 0V 1 μA
GS
Gate to Source Leakage Current VGS = ±12V, VDS= 0V ±10 μA
Gate to Source Threshold Voltage VGS = VDS, ID = 250μA 0.65 1.0 1.5 V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance VDS = 5V, ID = 0.75A 3 S
ID = 250μA, referenced to 25°C –3.0 mV/°C
VGS = 4.5V, ID = 0.75A
VGS = 2.7V, ID = 0.67A
VGS = 4.5V, ID = 0.75A ,TJ = 125°C
0.25
0.29
0.36
0.4
0.5
0.6
Dynamic Characteristics
C
iss
C
oss
C
rss
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Input Capacitance
V
Output Capacitance 20 30 pF
= 10V, VGS = 0V, f= 1MHZ
DS
90 120 pF
Reverse Transfer Capacitance 15 25 pF
(note 2)
Turn-On Delay Time
Rise Time 1 10 ns
Turn-Off Delay Time 9 18 ns
VDD = 5V, ID = 0.5A,
VGS = 4.5V,R
GEN
= 6Ω
4 10 ns
Fall Time 1 10 ns
Total Gate Charge
V
Gate to Source Charge 0.29 nC
=4.5V, VDD = 5V, ID = 0.75A
GS
1.03 1.44 nC
Gate to Drain “Miller” Charge 0.17 nC
Ω
®
MOSFET
Drain-Source Diode Characteristics
I
S
V
SD
Notes:
1. R
θJA
R
θJC
2. Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.
©2007 Fairchild Semiconductor Corporation
FDG8850NZ Rev.B
Maximum Continuous Drain-Source Diode Forward Current 0.3 A
Source to Drain Diode Forward Voltage V
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
is guaranteed by design while R
Scale 1:1 on letter size paper.
is determined by the user's board design.
θJA
a. 350°C/W when mounted on a
1 in
and Maximum Ratings
2
pad of 2 oz copper .
= 0V, IS = 0.3A (Note 2) 0.76 1.2 V
GS
b. 415°C/W when mounted on a minimum pad
of 2 oz copper.
2
www.fairchildsemi.com
FDG8850NZ Dual N-Channel PowerTrench
Typical Characteristics T
2.20
VGS = 4.5V
1.76
1.32
0.88
, DRAIN CURRENT (A)
0.44
D
I
0.00
0.0 0.5 1.0 1.5 2.0
V
DS
Figure 1.
1.6
ID = 0.75A
V
= 4.5V
GS
1.4
1.2
1.0
NORMALIZED
0.8
DRAIN TO SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
F i g u r e 3 . N o r m a l i z e d O n - R e s i s t a n c e
vs Junction Temperature
VGS = 2.7V
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
, DRAIN TO SOURCE VOLTAGE (V)
On-Region Characteristics Figure 2.
= 25°C unless otherwise noted
J
VGS = 2.0V
VGS =1.8V
VGS = 1.5V
2.6
VGS = 1.8V
2.2
VGS = 2.0V
1.8
1.4
NORMALIZED
V
= 2.7V
GS
1.0
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
DRAIN TO SOURCE ON-RESISTANCE
0.6
0.00 0.44 0.88 1.32 1.76 2.20
I
, DRAIN CURRENT(A)
D
V
= 3.5V
GS
V
= 4.5V
GS
N o r m a l i z e d O n - R e s i s t a n c e
vs Drain Current and Gate Voltage
0.8
ID =0.38A
(Ω)
0.6
, DRAIN TO
0.4
DS(on)
r
SOURCE ON-RESISTANCE
0.2
12345
Figure 4.
o
T
= 25
C
J
VGS, GATE TO SOURCE VOLTAGE (V)
O n - R es i s t a n c e vs G a t e t o
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
TJ = 125oC
Source Voltage
®
MOSFET
2.20
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
1.76
VDD = 5V
1.32
0.88
0.44
, DRAIN CURRENT (A)
D
I
0.00
0.0 0.5 1.0 1.5 2.0 2.5
TJ = 150oC
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
©2007 Fairchild Semiconductor Corporation
FDG8850NZ Rev.B
2
V
= 0V
GS
1
TJ = 150oC
0.1
TJ = 25oC
0.01
TJ = 25oC
TJ = -55oC
, REVERSE DRAIN CURRENT (A)
S
I
1E-3
0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6.
S o u r ce t o D r a i n Di o d e
TJ = -55oC
Forward Voltage vs Source Current
3
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FDG8850NZ Dual N-Channel PowerTrench
Typical Characteristics T
5
ID = 0.22A
4
3
2
1
, GATE TO SOURCE VOLTAGE(V)
0
GS
V
0.00.20.40.60.81.01.21.4
Figure 7.
4
1
0.1
, DRAIN CURRENT (A)
D
I
0.01
0.005
0.1 1 10 100
VDD = 5V
V
Qg, GATE CHARGE(nC)
Gate Charge Characteristics Figure 8.
D
E
T
I
M
I
L
)
n
o
(
S
r
D
SINGLE PULSE
T
= MAX RATED
J
O
= 415
R
T
Figure 9.
C/W
θJA
O
= 25
C
A
VDS, DRAIN to SOURCE VOLTAGE (V)
F o r w ar d B i a s S a fe
Operating Area
= 25°C unless otherwise noted
J
VDD = 10V
= 15V
DD
100μs
1ms
10ms
100ms
1s
DC
200
100
10
CAPACITANCE (pF)
f = 1MHz
= 0V
V
GS
1
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
C
iss
C
oss
C
rss
C a p a c i t a n c e v s D r a i n
to Source Voltage
50
10
1
, PEAK TRANSIENT POWER (W)
(PK)
P
0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
t, PULSE WIDTH (s)
Figure 10.
Single Pulse Maximum Power
SINGLE PULSE
R
= 415
θJA
TA = 25OC
Dissipation
O
30
®
MOSFET
C/W
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
θJA
0.05
0.02
0.1
0.01
IMPEDANCE, Z
NORMALIZED THERMAL
0.01
SINGLE PULSE
0.0001 0.001 0.01 0.1 1 10 100 1000
©2007 Fairchild Semiconductor Corporation
FDG8850NZ Rev.B
NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z
R
= 415oC/W
θJA
t, RECTANGULAR PULSE DURATION (s)
Figure 11. Transient Thermal Response Curve
4
P
DM
1/t2
x R
θJA
t
1
t
2
+ T
θJA
A
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FDG8850NZ Dual N-Channel PowerTrench
®
MOSFET
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO
IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE
OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE
RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,
SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT
THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or (b)
support or sustain life, and (c) whose failure to perform when
properly used in accordance with instructions for use provided in
the labeling, can be reasonably expected to result in a significant
injury of the user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or In Design
Preliminary First Production This datasheet contains preliminary data; supplementary data will
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Obsolete
Not In Production
2. A critical component in any component of a life support,
device, or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
Definition
This datasheet contains the design specifications for product
development. Specifications may change in any manner
without notice.
be published at a later date. Fairchild Semiconductor reserves the
right to make changes at any time without notice to improve
design.
Semiconductor reserves the right to make changes at any time
without notice to improve design.
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor.The datasheet is printed
for reference information only.
Rev. I 26
©2007 Fairchild Semiconductor Corporation
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