Fairchild FDG6321C service manual

November 1998

FDG6321C
Dual N & P Channel Digital FET

General Description Features

These dual N & P-Channel logic level enhancement mode field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
This device has been designed especially for low voltage
applications as a replacement for bipolar digital transistors and
small signal MOSFETS. Since bias resistors are not required,
this dual digital FET can replace several different digital
transistors, with different bias resistor values.

SC70-6

SOT-23

SuperSOTTM-6

S2

G2

D1

SC70-6

.21

S1

D2

G1

N-Ch 0.50 A, 25 V, R
R

P-Ch -0.41 A, -25 V,R
R

= 0.45 Ω @ VGS= 4.5V.

DS(ON)

= 0.60 Ω @ VGS= 2.7 V.

DS(ON)

= 1.1 Ω @ VGS= -4.5V.

DS(ON)

= 1.5 Ω @ VGS= -2.7V.

DS(ON)

Very small package outline SC70-6.
Very low level gate drive requirements allowing direct

operation in 3 V circuits(V

GS(th)

< 1.5 V).

Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).

SOT-8

1

2

3

SO-8

SOIC-14

6

5

4

Absolute Maximum Ratings T

= 25oC unless otherwise noted

A

Symbol Parameter N-Channel P-Channel Units

V

DS

V

GSS

I

D

Drain-Source Voltage 25 -25 V

S

Gate-Source Voltage 8 -8 V
Drain Current - Continuous 0.5 -0.41 A

- Pulsed 1.5 -1.2

P

D

TJ,T
ESD Electrostatic Discharge Rating MIL-STD-883D

Maximum Power Dissipation (Note 1) 0.3 W
Operating and Storage Temperature Ranger -55 to 150 °C

STG

6 kV

Human Body Model (100pf / 1500 Ohm)

THERMAL CHARACTERISTICS

R

θJA

© 1998 Fairchild Semiconductor Corporation

Thermal Resistance, Junction-to-Ambient (Note 1) 415 °C/W

FDG6321C Rev. D

Electrical Characteristics (T

= 25 OC unless otherwise noted )

A

Symbol Parameter Conditions
OFF CHARACTERISTICS

BV

DSS

Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA N-Ch 25 V

VGS = 0 V, ID = -250 µA

∆BV

DSS

Breakdown Voltage Temp. Coefficient ID= 250 µA, Referenced to 25 oC N-Ch 26 mV/oC

/∆T

J

ID = -250 µA, Referenced to 25 oC

I

DSS

I

GSS

I

GSS

Zero Gate Voltage Drain Current V

Gate - Body Leakage Current

Gate - Body Leakage Current

= 20 V, V

DS

VDS = -20 V, V

VGS = 8 V, V
VGS = -8 V, V

ON CHARACTERISTICS (Note 2)

V

GS(th)

Gate Threshold Voltage

VDS = VGS, ID = 250 µA
VDS = VGS, ID = -250 µA P-Ch -0.65 -0.82 -1.5

∆V

GS(th)

Gate Threshold Voltage Temp. Coefficient

/∆T

J

ID = 250 µA, Referenced to 25 oC
ID = -250 µA, Referenced to 25 oC P-Ch 2.1

R

DS(ON)

Static Drain-Source On-Resistance

VGS = 4.5 V, ID = 0.5 A

VGS = 2.7 V, ID = 0.2 A
VGS = -4.5 V, ID = -0.41 A P-Ch 0.85 1.1

VGS = -2.7 V, ID = -0.25 A 1.15 1.5

I

D(ON)

On-State Drain Current

VGS = 4.5 V, VDS = 5 V
VGS = -4.5 V, VDS = -5 V P-Ch -0.41

g

FS

Forward Transconductance

VDS = 5 V, ID = 0.5 A
VDS = -5 V, ID = -0.41 A P-Ch 0.9

DYNAMIC CHARACTERISTICS

C

iss

C

oss

Input Capacitance N-Channel N-Ch 50 pF

V

= 10 V, V

DS

Output Capacitance f = 1.0 MHz N-Ch 28

P-Channel P-Ch 34

C

rss

Reverse Transfer Capacitance

V

= -10 V, VGS = 0V,

DS

f = 1.0 MHz P-Ch 10

Min Typ Max Units

Type

P-Ch -25

P-Ch -22

= 0 V N-Ch 1 µA

GS

TJ = 55°C 10

GS

= 0 V

P-Ch -1 µA

TJ = 55°C -10

= 0 V

DS

= 0 V P-Ch -100 nA

DS

N-Ch 100 nA

N-Ch 0.65 0.8 1.5 V

N-Ch -2.6

N-Ch 0.34 0.45

TJ =125°C 0.55 0.72

0.44 0.6

TJ =125°C

1.2 1.8

N-Ch 0.5 A

N-Ch 1.45 S

GS

= 0 V,

P-Ch 62

N-Ch 9

mV/ oC

Ω

FDG6321C Rev. D

Electrical Characteristics (continued)

SWITCHING CHARACTERISTICS (Note 2)
Symbol Parameter Conditions

t

D(on)

Turn - On Delay Time N-Channel N-Ch 3 6 nS

Type

VDD = 5 V, ID = 0.5 A, P-Ch 7 15

t

r

Turn - On Rise Time

V

= 4.5 V, R

GS

= 50 Ω

GEN

N-Ch 8.5 18 nS
P-Ch 8 16

t

D(off)

Turn - Off Delay Time P-Channel N-Ch 17 30 nS

VDD = -5 V, ID = -0.5 A, P-Ch 55 80

t

f

Turn - Off Fall Time

VGS = -4.5 V, R

GEN

= 50 Ω

N-Ch 13 25 nS
P-Ch 35 60

Q

g

Q

gs

Total Gate Charge N-Channel N-Ch 1.64 2.3 nC

V

= 5 V, ID = 0.5 A,

DS

P-Ch 1.1 1.5

Gate-Source Charge VGS = 4.5 V N-Ch 0.38 nC

P- Channel P-Ch 0.31

Q

gd

Gate-Drain Charge

VDS = -5 V, ID = -0.41 A,
VGS = -4.5 V

N-Ch 0.45 nC
P-Ch 0.29

DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

I

S

Maximum Continuous Drain-Source Diode Forward Current N-Ch 0.25 A

P-Ch -0.25

V

SD

Notes:

1. R
design while R

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.5 A

VGS = 0 V, IS = -0.5 A

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R

JA

θ

is determined by the user's board design. R

CA

θ

= 415OC/W on minimum mounting pad on FR-4 board in still air.

JA

θ

(Note 2) N-Ch 0.8 1.2 V

(Note 2)

P-Ch -0.85 -1.2

Min Typ Max Units

is guaranteed by

JC

θ

FDG6321C Rev. D