Fairchild FDG6317NZ service manual
FDG6317NZ
Dual 20v N-Channel PowerTrench MOSFET
FDG6317NZ Dual 20v N-Channel PowerTrench
May 2009
General Description
This dual N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized use
in small switching regulators, providing an extremely
low R
and gate charge (QG) in a small package.
DS(ON)
Applications
• DC/DC converter
• Power management
• Load switch
•
RoHS Compliant
S
G
D
D
Pin 1
G
S
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
Features
• 0.7 A, 20 V. R
•
Gate-Source Zener for ESD ruggedness
(1.6kV Human Body Model). (Note 3)
• Low gate charge
• High performance trench technology for extremely
low R
DS(ON)
• Compact industry standard SC70-6 surface mount
package
= 400 mΩ @ V
DS(ON)
R
= 550 mΩ @ V
DS(ON)
= 4.5 V
GS
= 2.5 V
GS
®
MOSFET
Absolute Maximum Ratings T
=25oC unless otherwise noted
A
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 20 V
Gate-Source Voltage
Drain Current – Continuous (Note 1) 0.7 A
– Pulsed 2.1
Power Dissipation for Single Operation (Note 1) 0.3 W
Operating and Storage Junction Temperature Range –55 to +150
± 12
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient (Note 1) 415
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.67 FDG6317NZ 7’’ 8mm 3000 units
©2009 Fairchild Semiconductor Corporation
FDG6317NZ Rev.B1 (W)
1
www.fairchildsemi.c
V
°C
°C/W
om
FDG6317NZ Dual 20v N-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BVDSS
∆T
J
I
DSS
I
GSS
I
GSS
Drain–Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
VGS = 0 V, I
I
= 250 µA, Referenced to 25°C
D
= 250 µA
D
20 V
13
Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1
Gate–Body Leakage
Gate–Body Leakage
V
= ± 12 V, VDS = 0 V ± 10 µA
GS
V
= ± 4.5 V, VDS = 0 V ± 1 µA
GS
mV/°C
µA
On Characteristics (Note 2)
V
GS(th)
∆VGS(th)
∆T
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
VDS = VGS, I
I
= –250 µA, Referenced to 25°C
D
= 250 µA
D
VGS = 4.5 V, ID = 0.7 A
VGS = 2.5 V, ID = 0.6 A
VGS = 4.5 V, ID = 0.7 A, TJ=125°C
0.6 1.2 1.5 V
–2
300
450
390
400
550
560
mV/°C
mΩ
On–State Drain Current VGS = 4.5 V, VDS = 5 V 1 A
Forward Transconductance VDS = 5 V, ID = 0.7 A 1.8 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance 66.5 pF
Output Capacitance 19 pF
Reverse Transfer Capacitance
Gate Resistance
VDS = 10 V, V
GS
= 0 V,
f = 1.0 MHz
VGS = 15 mV, f = 1.0 MHz
10 pF
5.8
Ω
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn–On Delay Time 5.5 11 ns
Turn–On Rise Time 7 15 ns
Turn–Off Delay Time 7.5 15 ns
Turn–Off Fall Time
Total Gate Charge 0.76 1.1 nC
Gate–Source Charge 0.18 nC
Gate–Drain Charge
VDD = 10 V, ID = 1 A,
VGS = 4.5 V, R
GEN
= 6 Ω
VDS = 10 V, ID = 0.7 A,
VGS = 4.5 V
2.5 5 ns
0.20 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
t
rr
Q
rr
Notes:
1. R
θJA
the drain pins. R
Maximum Continuous Drain–Source Diode Forward Current 0.25 A
Drain–Source Diode Forward
VGS = 0 V, IS = 0.25 A (Note 2) 0.8 1.2 V
Voltage
Diode Reverse Recovery Time 8.3 nS
Diode Reverse Recovery Charge
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
IF = 0.7 A, diF/dt = 100 A/µs
is determined by the user's board design. R
θJA
1.2 nC
= 415°C/W when mounted on a minimum pad .
θJA
®
MOSFET
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2009 Fairchild Semiconductor Corporation
FDG6317NZ Rev.B1 (W)
2
www.fairchildsemi.com
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