Fairchild FDG312P service manual

FDG312P

P-Channel 2.5V Specified PowerT rench MOSFET

General Description

This P-Channel MOSFET is produced using Fairchild
Semiconductor's advanced PowerTrench process that
has been especially tailored to minimize the on-state
resistance and yet maintain low gate charge for
superior switching performance. These devices are
well suited for portable electronics applications.

Applications

• Load switch

• Battery protection

• Power management

Features

• -1.2 A, -20 V. R

R

• Low gate charge (3.3 nC typical).

• High performance trench technology for extremely

low R

DS(ON)

.

• Compact industry standard SC70-6 surface mount

package.

= 0.18 Ω @ V

DS(on)

= 0.25 Ω @ V

DS(on)

February 1999

= -4.5 V

GS

= -2.5 V.

GS

FDG312P

S

D

1

6

D

2

G

D

SC70-6

D

Absolute Maximum Ratings

TA = 25°C unless otherwise noted

3

3

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

P

D

TJ, T

stg

Drain-Source Voltage -20 V
Gate-Source Voltage
Drain Current - Continuous

- Pulsed -6

Power Dissipation for Si ngl e Operat i on

(Note 1b)

Operating and Storage Junction Temperature Range -55 to +150

(Note 1)

(Note 1a)

(Note 1c)

8V

±

-1.2 A

0.75 W

0.55

0.48

5

4

C

°

Thermal Characteristics

R

JA

θ

Thermal Resistance, J unc tion-to-Ambient

(Note 1)

260

C/W

°

Package Outlines and Ordering Information

Device Marking Device Reel Size Tape Width Quantity

12

.

1999 Fairchild Semiconductor Corporation

FDG312P 7’’ 8mm 3000 units

FDG312P Rev. C

FDG312P

yp

DMOS Electrical Characteristics

TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min T

Off Characteristics

BV

DSS

BV

∆

T

∆

I

DSS

I

GSSF

I

GSSR

On Characteristics

V

GS(th)

GS(th)

V

∆

T

∆

R

DS(on)

I

D(on)

g

FS

Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA-20 V
Breakdown Voltage Temperature

DSS

Coefficient

J

ID = -250 µA, Referenced to 25°C-19 mV/

Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V -1
Gate-Body Leakage Current, Forward VGS = 8 V, VDS = 0 V 100 nA
Gate-Body Leakage Current, Reverse VGS = -8 V, VDS = 0 V -100 nA

(Note 2)

Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.4 -0.9 -1.5 V
Gate Threshold Voltage

Temperature Coefficient

J

Static Drain-Source
On-Resistance

ID = -250 µA, Referenced to 25°C2.5 mV/

VGS = -4.5 V, ID = -1.2 A
V

= -4.5 V, ID = -1.2 A @125°C

GS

V

= -2.5 V, ID = -1 A

GS

On-State Drain Current VGS = -4.5 V, VDS = -5 V -3 A
Forward Transconductance VDS = -5 V, ID = -1.2 A 3.8 S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance 330 pF
Output Capacitance 80 pF

= -10 V, VGS = 0 V,

V

DS

f = 1.0 MHz

Reverse Transfer Capacitance

Max Units

0.135

0.200

0.187

0.18

0.29

0.25

35 pF

C

°

A

µ

C

°

Ω

(Note 2)

Switching Characteristics

t
t
t
t
Q
Q
Q

d(on)

r

d(off)

f

g

gs

gd

Turn-On Delay Time 7 15 ns
Turn-On Rise Time 12 22 ns
Turn-Off Delay Time 16 26 ns
Turn-Off Fall Time
Total Gate Charge 3.3 5 nC
Gate-Source Charge 0.8 nC
Gate-Drain Charge

V

= -5 V, ID = -0.5 A,

DD

V

= -4.5 V, R

GS

= -10 V, ID = -1.2 A,

V

DS

= -4.5 V

V

GS

GEN

= 6

Ω

512ns

0.7 nC

Drain-Source Diode Characteristics and Maximum Ratings

I

S

V

SD

Notes:

1. R

drain pins. R

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%

Maximum Continuous Drain-Source Diode Forward Current -0.6 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.6 A

is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the

θJA

is guaranteed by design while R

θJC

a) 170°C/W when

mounted on a 1 in
pad of 2oz copper.

is determined by the user's board design.

θJA

2

b) 225°C/W when
mounted on a half
of package sized 2oz.

copper.

(Note 2)

-0.83 -1.2 V

c) 260°C/W when
mounted on a minimum
pad of 2oz copper.

FDG312P Rev. C