Fairchild FDD86113LZ service manual
FDD86113LZ
S
G
D
G
S
D
TO-252
D-PAK
(TO-252)
N-Channel PowerTrench® MOSFET
100 V, 5.5 A, 104 mΩ
Features
Max r
Max r
HBM ESD protection level > 6 kV typical (Note 4)
High performance trench technology for extremely low rDS(on)
= 104 mΩ at V
DS(on)
= 156 mΩ at V
DS(on)
= 10 V, ID = 4.2 A
GS
= 4.5 V, ID = 3.4 A
GS
General Description
This N-Channel logic Level MOSFETs are produced using
Fairchild Semiconductor‘s advanced Power Trench
that has been special tailored to minimize the on-state resistance
and yet maintain superior switching performance. G-S zener has
been added to enhance ESD voltage level.
FDD86113LZ N-Channel PowerTrench
December 2011
® process
High power and current handling capability in a widely used
surface mount package
100% UIL Tested
RoHS Compliant
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Drain to Source Voltage 100 V
Gate to Source Voltage ±20 V
Drain Current -Continuous(Package limited) T
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 15
Single Pulse Avalanche Energy (Note 3) 12 mJ
Power Dissipation TC = 25 °C 29
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
= 25 °C unless otherwise noted
C
Application
DC-DC conversion
= 25 °C 5.5
C
= 25 °C 11.8
C
A = 25 °C (Note 1a) 4.2
= 25 °C (Note 1a) 3.1
A
Thermal Characteristics
®
MOSFET
A
W
R
θJC
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDD86113LZ FDD86113LZ D-PAK(TO-252) 13 ’’ 12 mm 2500 units
Thermal Resistance, Junction to Case (Note 1) 4.3
Thermal Resistance, Junction to Ambient (Note 1a) 9
°C/W
©2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com
FDD86113LZ Rev. C
FDD86113LZ N-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV
ΔT
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 80 V, V
Gate to Source Leakage Current VGS = ±20 V, V
I
= 250 μA, referenced to 25 °C 72 mV/°C
D
= 0 V 1 μA
GS
= 0 V ±10 μA
DS
On Characteristics
V
GS(th)
ΔV
ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA11.53V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 μA, referenced to 25 °C -5 mV/°C
D
V
= 10 V, ID = 4.2 A 87 104
GS
= 4.5 V, ID = 3.4 A 116 156
GS
= 10 V, ID = 4.2 A,TJ = 125 °C 142 170
V
GS
Forward Transconductance VDS = 5 V, ID = 4.2 A 9 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 55 75 pF
Reverse Transfer Capacitance 2.4 5 pF
= 50 V, VGS = 0 V,
V
DS
f = 1MHz
Gate Resistance 1.4 Ω
213 285 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time 1.3 10 ns
Turn-Off Delay Time 9.7 20 ns
= 50 V, ID = 4.2 A,
V
DD
V
= 10 V, R
GS
GEN
= 6 Ω
Fall Time 1.6 10 ns
Total Gate Charge V
Total Gate Charge V
Gate to Source Charge 0.6 nC
= 0 V to 10 V
GS
= 0 V to 4.5 V 1.9 3
GS
V
DD
I
= 4.2 A
D
= 50 V,
Gate to Drain “Miller” Charge 0.7 nC
3.6 10 ns
3.7 6 nC
mΩV
®
MOSFET
Drain-Source Diode Characteristics
V
= 0 V, IS = 4.2 A (Note 2) 0.88 1.3
V
SD
t
rr
Q
rr
NOTES:
1. R
is determined with the device mount ed on a 1 in2 pad 2 oz copper pad on a 1.5 x 1. 5 in. bo ard of FR-4 mater ial. R
θJA
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. Starting T
4. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2011 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com
FDD86113LZ Rev. C
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 20 33 nC
a)
40 °C/W when mounted on a
2
1 in
pad of 2 oz copper
= 25 °C, L = 1 mH, IAS = 5 A, VDD = 90 V, VGS = 10 V.
J
GS
= 0 V, IS = 1.7 A (Note 2) 0.80 1.2
V
GS
= 4.2 A, di/dt = 100 A/μs
I
F
θJC
31 49 ns
is guaranteed by design while R
96 °C/W when mounted on a
b)
minimum pad of 2 oz copper
is determined by
θCA
V
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