FDD86110
G
S
D
TO-252
D-PAK
(TO-252)
N-Channel PowerTrench® MOSFET
100 V, 50 A, 10.2 mΩ
FDD86110 N-Channel PowerTrench
October 2011
Features
Max r
Max r
100% UIL tested
RoHS Compliant
= 10.2 mΩ at VGS = 10 V, ID = 12.5 A
DS(on)
= 16 mΩ at VGS = 6 V, ID = 9.8 A
DS(on)
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench
been especially tailored to minimize the on-state resistance and
yet maintain superior switching performance.
®
process that has
Application
DC - DC Conversion
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Drain to Source Voltage 100 V
Gate to Source Voltage ±20 V
Drain Current -Continuous (Package limited) TC = 25 °C 50
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 60
Single Pulse Avalanche Energy (Note 3) 135 mJ
Power Dissipation TC = 25 °C 127
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
= 25 °C unless otherwise noted
C
= 25 °C 80
C
= 25 °C (Note 1a) 12.5
A
= 25 °C (Note 1a) 3.1
A
A
W
Thermal Characteristics
R
θJC
R
θJA
Thermal Resistance, Junction to Case 0.98
Thermal Resistance, Junction to Ambient (Note 1a) 40
°C/W
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDD86110 FDD86110 D-PAK(TO-252) 13 ’’ 12 mm 2500 units
©2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com
FDD86110 Rev.C
FDD86110 N-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV
ΔT
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 80 V, V
Gate to Source Leakage Current VGS = ±20 V, V
I
= 250 μA, referenced to 25 °C 72 mV/°C
D
= 0 V 1 μA
GS
= 0 V ±100 nA
DS
On Characteristics
V
GS(th)
ΔV
ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA22.84V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 μA, referenced to 25 °C -10 mV/°C
D
V
= 10 V, ID = 12.5 A 8.5 10.2
GS
= 6 V, ID = 9.8 A 11.3 16
GS
= 10 V , ID = 12.5 A,TJ = 125°C 15 18
V
GS
Forward Transconductance VDS = 10 V, ID = 12.5 A 38 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 379 505 pF
Reverse Transfer Capacitance 17 30 pF
Gate Resistance 0.5 Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time
Rise Time 5.4 10 ns
Turn-Off Delay Time 19 35 ns
Fall Time 3.9 10 ns
Total Gate Charge VGS = 0 V to 10 V
Gate to Source Charge 7.1 nC
Gate to Drain “Miller” Charge 5.2 nC
= 50 V, VGS = 0 V,
V
DS
f = 1MHz
= 50 V, ID = 12.5 A,
V
DD
V
= 10 V, R
GS
GEN
= 6 Ω
V
DD
I
= 12.5 A
D
= 50 V,
1702 2265 pF
12 20 ns
25 35 nC
mΩV
®
MOSFET
Drain-Source Diode Characteristics
V
= 0 V, IS = 12.5 A (Note 2) 0.80 1.3 V
V
SD
t
rr
Q
rr
Notes:
1: R
θJA
R
θJC
2: Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.
3: Starting T
©2011 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com
FDD86110 Rev.C
Source-Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 60 96 nC
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
is guaranteed by design while R
= 25 °C, L = 0.3 mH, IAS = 30 A, VDD = 90 V, VGS = 10 V.
J
is determined by the user’s board design.
θJA
a)
40 °C/W when mounted on a
1 in2 pad of 2 oz copper
GS
= 0 V, IS = 2.6 A (Note 2) 0.72 1.2
V
GS
= 12.5 A, di/dt = 100 A/μs
I
F
b)
52 83 ns
96 °C/W when mounted on
a minimum pad