Fairchild FDD86102 service manual
FDD86102
G
S
D
TO-252
D-PAK
(TO-252)
D
G
S
N-Channel PowerTrench® MOSFET
100 V, 36 A, 24 mΩ
Features
Max r
Max r
High performance trench technology for extremely low r
High power and current handling capability in a widely used
surface mount package
Very low Qg and Qgd compared to competing trench
technologies
Fast switching speed
100% UIL tested
RoHS Compliant
= 24 mΩ at VGS = 10 V, ID = 8 A
DS(on)
= 38 mΩ at VGS = 6 V, ID = 6 A
DS(on)
DS(on)
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench
been optimized for
ruggedness.
Application
DC - DC Conversion
March 2012
®
r
, switching performance and
DS(on)
process that has
FDD86102 N-Channel PowerTrench
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Drain to Source Voltage 100 V
Gate to Source Voltage ±20 V
Drain Current -Continuous TC = 25 °C 36
-Pulsed 40
Single Pulse Avalanche Energy (Note 3) 121 mJ
Power Dissipation TC = 25 °C 62
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
= 25 °C unless otherwise noted
C
= 25 °C (Note 1a) 8
A
= 25 °C (Note 1a) 3.1
A
A -Continuous T
W
Thermal Characteristics
R
θJC
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDD86102 FDD86102 D-PAK(TO-252) 13 ’’ 12 mm 2500 units
©2012 Fairchild Semiconductor Corporation
FDD86102 Rev.C5
Thermal Resistance, Junction to Case 2.0
Thermal Resistance, Junction to Ambient (Note 1a) 40
1
°C/W
www.fairchildsemi.com
FDD86102 N-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
ΔBV
DSS
ΔT
J
I
DSS
I
GSS
On Characteristics
V
GS(th)
ΔV
GS(th)
ΔT
J
r
DS(on)
g
FS
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 80 V, V
Gate to Source Leakage Current VGS = ±20 V, V
I
= 250 μA, referenced to 25 °C 67 mV/°C
D
= 0 V 1 μA
GS
= 0 V ±100 nA
DS
(Note 2)
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 2 3.1 4 V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance VDS = 10 V, ID = 8 A 21 S
I
= 250 μA, referenced to 25 °C -8.5 mV/°C
D
V
= 10 V, ID = 8 A 19 24
GS
= 6 V, ID = 6 A 26 38
GS
= 10 V, ID = 8 A, TJ = 125 °C 33 44
V
GS
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 180 240 pF
Reverse Transfer Capacitance 15 25 pF
= 50 V, VGS = 0 V,
V
DS
f = 1 MHz
780 1035 pF
Gate Resistance 0.4 Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g
g
gs
gd
Turn-On Delay Time
Rise Time 3 10 ns
Turn-Off Delay Time 13.4 24 ns
= 50 V, ID = 8 A,
V
DD
= 10 V, R
V
GS
GEN
= 6 Ω
7.6 15 ns
Fall Time 2.9 10 ns
Total Gate Charge VGS = 0 V to 10 V
Total Gate Charge VGS = 0 V to 5 V 7.6 11 nC
Gate to Source Gate Charge 4.0 nC
V
DD
I
D
= 8 A
= 50 V,
13.4 19 nC
Gate to Drain “Miller” Charge 3.7 nC
mΩV
®
MOSFET
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
θJA
R
θJC
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
121 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 9 A, VDD = 100 V, VGS = 10 V. 100% test at L = 0.1 mH, I
3. E
AS
FDD86102 Rev.C5
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 43 68 nC
is guaranteed by design while R
is determined by the user’s board design.
θJA
V
= 0 V, IS = 8 A (Note 2) 0.8 1.3
GS
= 0 V, IS = 2.6 A (Note 2) 0.7 1.2
V
GS
= 8 A, di/dt = 100 A/μs
I
F
a. 40 °C/W when mounted on a
1 in2 pad of 2 oz copper.
V
43 68 ns
b. 96 °C/W when mounted on a
minimum pad of 2 oz copper.
= 30 A.
AS
2
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