Fairchild FDD4685 service manual

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FDD4685

(

)

40V P-Channel PowerTrench® MOSFET

–40V, –32A, 27mΩ

Features

 Max r

 Max r

 High performance trench technology for extremely low r

 RoHS Compliant

= 27mΩ at VGS = –10V, ID = –8.4A

DS(on)

= 35mΩ at VGS = –4.5V, ID = –7A

DS(on)

DS(on)

General Description

This P-Channel MOSFET has been produced using Fairchild
Semiconductor’s proprietary PowerTrench
deliver low
superior performance in application.

r

DS(on)

Application

October 2006

®

and good switching characteristic offering

technology to

FDD4685 40V P-Channel PowerTrench

 Inverter

 Power Supplies

S

D

G

G

S

D-PAK

TO-252

TO-252

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DS

V

GS

I

D

E

AS

P

D

, T

T

J

STG

Thermal Characteristics

Drain to Source Voltage –40 V

Gate to Source Voltage ±20 V

Drain Current -Continuous(Package Limited) TC= 25°C –32

-Continuous(Silicon Limited) T

-Continuous T

-Pulsed –100

Drain-Source Avalanche Energy (Note 3) 121 mJ

Power Dissipation TC= 25°C 69

Power Dissipation (Note 1a) 3

Operating and Storage Junction Temperature Range –55 to +150 °C

= 25°C unless otherwise noted

C

C

A

= 25°C (Note 1) –40

= 25°C (Note 1a) –8.4

D

®

MOSFET

A

W

R

θJC

R

θJA

Thermal Resistance, Junction to Case 1.8

Thermal Resistance, Junction to Ambient (Note 1a) 40

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

FDD4685 FDD4685 D-PAK(TO-252) 13’’ 12mm 2500 units

©2006 Fairchild Semiconductor Corporation
FDD4685 Rev.B

°C/W

1

www.fairchildsemi.com

FDD4685 40V P-Channel PowerTrench

Electrical Characteristics T

= 25°C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BV

DSS

∆T

J

I

DSS

I

GSS

On Characteristics

V

GS(th)

∆V

GS(th)

∆T

J

r

DS(on)

g

FS

Drain to Source Breakdown Voltage ID = –250µA, VGS = 0V –40 V

Breakdown Voltage Temperature
Coefficient

Zero Gate Voltage Drain Current VDS = –32V, V

Gate to Source Leakage Current VGS = ±20V, V

ID = –250µA, referenced to 25°C –33 mV/°C

= 0V –1 µA

GS

= 0V ±100 nA

GS

(Note 2)

Gate to Source Threshold Voltage VGS = VDS, ID = –250µA –1 –1.6 –3 V

Gate to Source Threshold Voltage
Temperature Coefficient

Static Drain to Source On Resistance

Forward Transconductance VDS = –5V, ID = –8.4A 23 S

ID = –250µA, referenced to 25°C 4.9 mV/°C

VGS = –10V, ID = –8.4A 23 27

VGS = –10V, ID = –8.4A, TJ=125°C 33 42

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance

Output Capacitance 260 345 pF

Reverse Transfer Capacitance 140 205 pF

VDS = –20V, VGS = 0V,
f = 1MHz

1790 2380 pF

Gate Resistance f = 1MHz 4 Ω

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

g(TOT)

Q

gs

Q

gd

Turn-On Delay Time

Rise Time 15 27 ns

Turn-Off Delay Time 34 55 ns

VDD = –20V, ID = –8.4A
VGS = –10V, R

GEN

= 6Ω

8 16 ns

Fall Time 14 26 ns

Total Gate Charge

Gate to Source Gate Charge 5.6 nC

VDD =–20V, ID = –8.4A
V

= –5V

GS

19 27 nC

Gate to Drain “Miller” Charge 6.1 nC

mΩVGS = –4.5V, ID = –7A 30 35

®

MOSFET

Drain-Source Diode Characteristics

V

SD

t

rr

Q

rr

Notes:

1: R

θJA

R

θJC

a. 40°C/W when mounted on a 1 in

b. 96°C/W when mounted on a minimum pad.

2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3: Starting TJ = 25°C, L = 3mH, IAS = 9A, VDD = 40V, V

FDD4685 Rev.B

Source to Drain Diode Forward Voltage V

Reverse Recovery Time

Reverse Recovery Charge 31 47 nC

is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.

is guaranteed by design while R

is determined by the user’s board design.

θJA

2

pad of 2 oz copper

GS

= 10V.

= 0V, IS = –8.4A (Note 2) –0.85 –1.2 V

GS

IF = –8.4A, di/dt = 100A/µs

2

30 45 ns

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