FDC6561AN
Dual N-Channel Logic Level PowerTrenchTM MOSFET
General Description Features
April 1999
These N-Channel Logic Level MOSFETs are
produced using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
low gate charge for superior switching performance.
These devices are well suited for all applications where
small size is desireable but especially low cost DC/DC
conversion in battery powered systems.
SOT-23
SuperSOTTM-8
D2
S1
D1
.561
G2
S2
pin 1
SuperSOT -6
TM
G1
2.5 A, 30 V. R
R
= 0.095 Ω @ VGS = 10 V
DS(ON)
= 0.145 Ω @ VGS = 4.5 V
DS(ON)
Very fast switching.
Low gate charge (2.1nC typical).
SuperSOTTM-6 package: small footprint (72% smaller than
standard SO-8); low profile (1mm thick).
SO-8
SOT-223SuperSOTTM-6
4
5
6
SOIC-16
3
2
1
Absolute Maximum Ratings T
Symbol Parameter Ratings Units
V
V
I
D
Drain-Source Voltage 30 V
DSS
Gate-Source Voltage - Continuous ±20 V
GSS
Drain Current - Continuous 2.5 A
= 25°C unless otherwise note
A
- Pulsed 10
P
TJ,T
THERMAL CHARACTERISTICS
R
R
© 1999 Fairchild Semiconductor Corporation
Maximum Power Dissipation (Note 1a) 0.96 W
D
STG
JA
θ
JC
θ
(Note 1b)
(Note 1c)
0.9
0.7
Operating and Storage Temperature Range -55 to 150 °C
Thermal Resistance, Junction-to-Ambient (Note 1a) 130 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W
FDC6561AN Rev.C
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
∆BV
I
DSS
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 30 V
Breakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC 23.6 mV/oC
/∆T
J
Zero Gate Voltage Drain Current VDS = 24 V, V
= 0 V 1 µA
GS
TJ = 55 oC 10 µA
I
GSSF
I
GSSR
Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse VGS = -20 V, V
= 0 V -100 nA
DS
ON CHARACTERISTICS (Note 2)
V
∆V
R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage VDS = VGS, ID = 250 µA 1 1.8 3 V
Gate Threshold VoltageTemp.Coefficient ID = 250 µA, Referenced to 25 oC -4 mV/oC
/∆T
J
Static Drain-Source On-Resistance VGS = 10 V, ID = 2.5 A 0.082 0.095
TJ = 125 oC 0.122 0.152
VGS = 4.5 V, ID = 2.0 A 0.113 0.145
I
g
D(on)
FS
On-State Drain Current VGS = 10 V, VDS = 5 V 10 A
Forward Transconductance VDS = 5 V, ID = 2.5 A 5 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = 15 V, VGS = 0 V, 220 pF
Output Capacitance f = 1.0 MHz 50 pF
Reverse Transfer Capacitance 25 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
g
gs
gd
Turn - On Delay Time VDD = 5 V, ID = 1 A, 6 12 ns
Turn - On Rise Time
VGS = 10 V, R
GEN
= 6 Ω
Turn - Off Delay Time 12 22 ns
Turn - Off Fall Time 2 6 ns
Total Gate Charge VDS = 15 V, ID = 2.5 A 2.3 3.2 nC
Gate-Source Charge VGS = 5 V 0.7 1 nC
Gate-Drain Charge 0.9 1.3 nC
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
V
SD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
by design while R
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
Continuous Source Diode Current 0.75 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.75 A (Note 2) 0.78 1.2 V
is determined by the user's board design.
CA
θ
10 18 ns
is guaranteed
JC
θ
Ω
a. 130OC/W on a 0.125 in2 pad of
2oz copper.
b. 140OC/W on a 0.005 in2 pad of
2oz copper.
c. 180OC/W on a minimum pad.
FDC6561AN Rev.C