Fairchild FDC655BN service manual
tm
FDC655BN
Single N-Channel, Logic Level, PowerTrench® MOSFET
30 V, 6.3 A, 25 mΩ
Features
Max r
Max r
Fast switching
Low gate charge
High performance trchnology for extremely low r
Termination is Lead-free and RoHS Compliant
= 25 mΩ at VGS = 10 V, ID = 6.3 A
DS(on)
= 33 mΩ at VGS = 4.5 V, ID = 5.5 A
DS(on)
DS(on)
General Description
This N-Channel Logic Level MOSFET is produced using
Fairchild Semiconductor’s advanced Power
that has been especially tailored to minimize the on-state
resistance and yet maintain superior switching performance.
These devices are well suited for low voltage and battery
powered applicatoins where low in-line power loss and fast
switching are required.
FDC655BN Single N-Channel, Logic Level, PowerTrench
January 2010
Trench® process
D
D
G
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
P
D
, T
T
J
STG
Drain to Source Voltage 30 V
Gate to Source Voltage ±20 V
-Continuous TA = 25°C (Note 1a) 6.3
-Pulsed 20
Power Dissipation ( Note 1a) 1.6
Power Dissipation (Note 1b) 0.8
Operating and Storage Junction Temperature Range -55 to + 150 °C
= 25°C unless otherwise noted
C
D
D
S
Thermal Characteristics
R
θJA
Thermal Resistance, Junction to Ambient (Note 1a) 78 °C/W
Package Marking and Ordering Information
®
MOSFET
A
W
Device Marking Device Package Reel Size Tape Width Quantity
.55B FDC655BN SSOT-6
©2010 Fairchild Semiconductor Corporation
FDC655BN Rev.C2
TM
1
7 ’’ 8 mm 3000 units
www.fairchildsemi.com
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
∆BV
∆T
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage I
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current V
Gate to Source Leakage Current V
= 250 µA, VGS = 0 V30 V
D
I
= 250 µA, referenced to 25°C 25 mV/°C
D
= 24 V, V
DS
= ±20 V, V
GS
= 0 V1µA
GS
= 0 V ±100nA
DS
On Characteristics
V
GS(th)
∆V
∆T
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, I
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance V
I
= 250 µA, referenced to 25°C -5 mV/°C
D
V
= 10 V, ID = 6.3 A 21 25
GS
= 4.5 V, ID = 5.5 A2633
GS
= 10 V, ID = 6.3 A, T
V
GS
= 10 V, ID = 6.3 A35S
DS
= 250 µA11.93V
D
= 125°C 30 36
J
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 100 130 pF
Reverse Transfer Capacitance 60 90 pF
= 15 V, VGS = 0 V,
V
DS
f = 1MHz
Gate Resistance 3.0 Ω
470 620 pF
FDC655BN Single N-Channel, Logic Level, PowerTrench
mΩV
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g
g
gs
gd
Turn-On Delay Time
Rise Time 210ns
Turn-Off Delay Time 15 26 ns
= 15 V, ID = 1 A,
V
DD
V
= 10 V, R
GS
GEN
= 6 Ω
611ns
Fall Time 210ns
Total Gate Charge V
Total Gate Charge V
Gate to Source Charge 1.4 nC
= 0 V to 10 V
GS
= 0 V to 5 V57nC
GS
V
DD
I
= 6.3 A
D
= 15 V,
913nC
Gate to Drain “Miller” Charge 1.6 nC
Drain-Source Diode Characteristics
I
S
V
SD
t
rr
Q
rr
Notes:
1: R
θJA
R
θJC
a. 78
b. 156 °C/W when mounted on a minimum pad.
2: Pulse Test: Pulse Width<300 us, Duty Cycle<2.0%.
Maximum Continuous Drain-Source Diode Forward Current 1.3 A
Source-Drain Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge 4 10 nC
is the sum of the junction-to-case and ca se-to-ambient thermal resistan ce where the case th ermal reference is defined as t he solder mountin g surface of the d rain pins.
is guaranteed by design while R
°C/W when mounted on a 1 in2 pad of 2 oz copper on FR-4 boar d.
is determined by the user’s board design.
θCA
= 0 V, IS = 1.3 A (Note 2) 0.8 1.2 V
GS
= 6.3 A, di/dt = 100 A/µs
I
F
15 26 ns
®
MOSFET
©2010 Fairchild Semiconductor Corporation
FDC655BN Rev.C2
2
www.fairchildsemi.com
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