Fairchild FDC638APZ service manual

P-Channel 2.5V PowerTrench® Specified MOSFET
–20V, –4.5A, 43m Features
Max r
Max r
Low gate charge (8nC typical).
High performance trench technology for extremely low r
SuperSOTTM –6 package:small footprint (72% smaller than
standard SO–8) low profile (1mm thick).
RoHS Compliant
DS(on)
DS(on)
= 43mΩ at V = 68mΩ at V
= –4.5V, ID = –4.5A
GS
= –2.5V, ID = –3.8A
GS
DS(on).
General Description
This P-Channel 2.5V specified MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance
These devices are well suited for battery power applications:load switching and power management,battery charging circuits,and DC/DC conversion.
Application
DC - DC Conversion
December 2006
®
process
FDC638APZ P-Channel 2.5V PowerTrench
®
Specified MOSFET
S
D
D
G
D
Pin 1
SuperSOTTM -6
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
P
D
, T
T
J
STG
Drain to Source Voltage –20 V
Gate to Source Voltage ±12 V
Drain Current -Continuous (Note 1a) –4.5
-Pulsed –20
Power Dissipation (Note 1a) 1.6
Power Dissipation (Note 1b) 0.8
Operating and Storage Junction Temperature Range –55 to +150 °C
D
= 25°C unless otherwise noted
A
D
1
D
2
G
3
3
6
5
4
Thermal Characteristics
R
θJA
R
θJA
Thermal Resistance, Junction to Ambient (Note 1a) 78
Thermal Resistance, Junction to Ambient (Note 1b) 156
Package Marking and Ordering Information
D
D
S
A
W
°C/W
Device Marking Device Reel Size Tape Width Quantity
.638Z FDC638APZ 7’’ 8mm 3000 units
©2006 Fairchild Semiconductor Corporation FDC638APZ Rev.B
1
www.fairchildsemi.com
FDC638APZ P-Channel 2.5V PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
BV
DSS
T
J
I
DSS
I
GSS
On Characteristics
V
GS(th)
V
GS(th)
T
J
r
DS(on)
I
D(on)
g
FS
Drain to Source Breakdown Voltage ID = –250µA, VGS = 0V –20 V
Breakdown Voltage Temperature Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current VGS = ±12V, V
ID = –250µA, referenced to 25°C –9.4 mV/°C
VDS = –16V, –1
V
= 0V TJ = 55°C –10
GS
= 0V ±10 µA
DS
Gate to Source Threshold Voltage VGS = VDS, ID = –250µA –0.4 –0.8 –1.5 V
Gate to Source Threshold Voltage Temperature Coefficient
Static Drain to Source On Resistance
On-State Drain Current VGS = –10V, VDS = –4.5A –20 A
Forward Transconductance VDS = –10V, ID = –4.5A 18 S
ID = –250µA, referenced to 25°C 2.9 mV/°C
VGS = –4.5V, I
= –4.5A 37 43
D
= –3.8A 52 68
D
VGS = –4.5V, ID = –4.5A, TJ = 125°C 50 72
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 155 210 pF
Reverse Transfer Capacitance 130 195 pF
VDS = –10V, VGS = 0V, f = 1MHz
750 1000 pF
mVGS = –2.5V, I
µA
®
Specified MOSFET
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time 20 31 ns
Turn-Off Delay Time 48 77 ns
Fall Time 47 72 ns
Total Gate Charge V
Gate to Source Gate Charge 2 nC
Gate to Drain “Miller” Charge 2 nC
(Note 2)
VDD = –5V, ID = –4.5A VGS = –4.5V, R
= 0V to –4.5V
GS
GEN
= 6
VDD = –5V ID = –4.5A
6 12 ns
8 12 nC
Drain-Source Diode Characteristics
I
S
V
SD
t
rr
Q
rr
Notes:
1: R
θJA
guaranteed by design while R
Maximum Continuous Drain-Source Diode Forward Current –1.3 A
Source to Drain Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge 13 20 nC
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.R
is determined by user’s board design.
θCA
a. 78°C/W when mounted on
2
pad of 2 oz copper on
a 1 in FR-4 board.
= 0V, IS = –1.3A (Note 2) –0.8 –1.2 V
GS
IF = –4.5A, di/dt = 100A/µs
b. 156°C/W when mounted on a minimum pad of 2 oz copper.
24 36 ns
θJC
is
2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
FDC638APZ Rev.B
2
www.fairchildsemi.com
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