Fairchild FDC6323L service manual
FDC6323L
Integrated Load Switch
General Description Features
V
These Integrated Load Switches are produced using
Fairchild's proprietary, high cell density, DMOS
technology. This very high density process is
especially tailored to minimize on-state resistance and
provide superior switching performance. These
devices are particularly suited for low voltage high
side load switch application where low conduction loss
and ease of driving are needed.
DROP
V
DROP
High density cell design for extremely low on-resistance.
V
ON/OFF
>6KV Human Body Model.
SuperSOTTM-6 package design using copper lead frame
for superior thermal and electrical capabilities.
March 1999
=0.2V @ VIN=5V, IL=1A, V
=0.3V @ VIN=3.3V, IL=1A, V
Zener protection for ESD ruggedness.
= 1.5V to 8V
ON/OFF
ON/OFF
= 1.5V to 8V.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
IN
ON/OFF
EQUIVALENT CIRCUIT
V
DROP
+
-
Vout,C1
Q1
3
2
1
Vout,C1
R2
1
pin
SuperSOT -6
TM
Absolute Maximum Ratings T
Vin,R1
4
ON/OFF
= 25°C unless otherwise noted
A
R1,C1
5
6
See Application Circuit
Q2
Symbol Parameter FDC6323L Units
V
V
I
L
IN
ON/OFF
Input Voltage Range 3 - 8 V
On/Off Voltage Range 1.5 - 8 V
Load Current @ V
=0.5V - Continuous (Note 1) 1.5 A
DROP
- Pulsed (Note 1 & 3) 2.5
P
D
TJ,T
ESD Electrostatic Discharge Rating MIL-STD-883D Human Body
Maximum Power Dissipation (Note 2a) 0.7 W
Operating and Storage Temperature Range -55 to 150 °C
STG
6 kV
Model (100pf/1500Ohm)
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
Thermal Resistance, Junction-to-Ambient (Note 2a) 180 °C/W
Thermal Resistance, Junction-to-Case (Note 2) 60 °C/W
OUT
© 1999 Fairchild Semiconductor Corporation
FDC6323L Rev.F
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
I
FL
I
RL
Forward Leakage Current VIN = 8 V, V
Reverse Leakage Current VIN = -8 V, V
= 0 V 1 µA
ON/OFF
= 0 V -1 µA
ON/OFF
ON CHARACTERISTICS (Note 3)
V
IN
V
ON/OFF
V
DROP
I
L
Notes:
1. VIN=8V, V
2. R
by design while R
P
D
Typical R
Input Voltage 3 8 V
On/Off Voltage 1.5 8 V
Conduction Voltage Drop @ 1A VIN = 5 V, V
VIN = 3.3 V, V
Load Current V
=8V, V
ON/OFF
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
T
(t)
=
R
θ
a. 180oC/W when mounted on a 2oz minimum copper pad.
=0.5V, TA=25oC
DROP
is determined by the user's board design.
CA
θ
T
J−TA
=
(t)
R
θJ A
θJ C
for single device operation using the board layouts shown below on FR-4 PCB in a still air environment:
JA
J−TA
+
2
(t)
= I
×R
DS(ON)@T
D
(t)
R
θCA
J
= 0.2 V, VIN = 5 V, V
DROP
V
= 0.3 V, VIN = 3.3 V, V
DROP
= 3.3 V 0.145 0.2 V
ON/OFF
= 3.3 V 0.178 0.3
ON/OFF
= 3.3 V 1 A
ON/OFF
= 3.3 V 1
ON/OFF
is guaranteed
JC
θ
2a
Scale 1 : 1 on letter size paper
3. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDC6323L Rev.F
Typical Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
0.5
T = 125°C
0.4
J
T = 25°C
J
0.3
DROP
0.2
V (V)
V = 5V
IN
V = 1.5 - 8V
0.1
0
0 1 2 3 4
Figure 1. V
DROP
I (A)
L
Versus IL at VIN=5V.
ON/OFF
PW =300us, D≤ 2%
1
I = 1A
L
V = 1.5 - 8V
0.8
ON/OFF
PW =300us, D≤ 2%
0.6
T = 125°C
DROP
0.4
V (V)
T = 25°C
J
0.2
0
1 2 3 4 5
J
V (V)
IN
0.5
T = 125°C
0.4
J
T = 25°C
J
0.3
DROP
V (V)
0.2
0.1
0
0 1 2 3 4
Figure 2. V
DROP
I (A)
L
Versus IL at VIN=3.3V.
0.4
0.35
0.3
T = 125°C
J
V = 3.3V
IN
V = 1.5 - 8V
ON/OFF
PW =300us, D≤ 2%
I = 1A
L
IN
V = 3.3V
PW =300us, D≤ 2%
0.25
(ON)
R ,(Ohm)
0.2
T = 25°C
J
0.15
0.1
0 1 2 3 4 5
I ,(A)
L
Figure 3. V
Versus V
DROP
at IL=1A.
IN
1
I = 1A
L
V = 1.5 - 8V
0.8
ON/OFF
PW =300us, D≤ 2%
0.6
(ON)
0.4
R ,(Ohm)
0.2
0
1 2 3 4 5
T = 25°C
J
T = 125°C
J
V ,(V)
IN
Figure 5. On Resistance Variation with
Input Voltage.
Figure 4. R
Versus IL at VIN=3.3V.
(ON)
FDC6323L Rev.F
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