Fairchild FDC608PZ service manual
FDC608PZ
June 2006
FDC608PZ
P-Channel 2.5V Specified PowerTrench® MOSFET
General Description
This P-Channel 2.5V specified MOSFET is produced
using Fairchild Semiconductor’s advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
low gate charge for superior switching performance.
These devices are well suited for battery power
applications: load switching and power management,
battery power circuits, and DC/DC conversions.
S
D
D
G
SuperSOT -6
TM
D
D
Features
• –5.8 A, –20 V. R
R
• Low Gate Charge
• High performance trench technology for extremely
low R
DS(ON)
• SuperSOT
smaller than standard SO
= 30 mΩ @ VGS = –4.5 V
DS(ON)
= 43 mΩ @ VGS = –2.5 V
DS(ON)
TM
–6 package: small footprint (72%
–8) low profile (1mm thick).
1
2
3
6
5
4
tm
Absolute Maximum Ratings T
o
=25
C unless otherwise noted
A
Symbol Parameter Ratings Units
V
Drain-Source Voltage –20 V
DSS
V
Gate-Source Voltage
GSS
Drain Current – Continuous (Note 1a) –5.8 ID
– Pulsed –20
Maximum Power Dissipation (Note 1a) 1.6 PD
TJ, T
Operating and Storage Junction Temperature Range –55 to +150
STG
(Note 1b)
±12
0.8
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a) 78
(Note 1) 30
°C/W
°C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.608Z FDC608PZ 7’’ 8mm 3000 units
©2006 Fairchild Semiconductor Corporation
FDC608PZ Rev B (W)
V
A
W
°C
FDC608PZ
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
∆BVDSS
∆T
I
Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1
DSS
I
Gate–Body Leakage
GSS
Breakdown Voltage Temperature
Coefficient
J
= 0 V, ID = –250 µA
V
GS
I
= –250 µA,Referenced to 25°C
D
= ±12 V, VDS = 0 V
V
GS
–20 V
–10
mV/°C
µA
±10 µA
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
∆VGS(th)
∆TJ
R
DS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
I
On–State Drain Current VGS = –4.5 V, VDS = –5 V –20 A
D(on)
= VGS, ID = –250 µA
V
DS
I
= –250 µA,Referenced to 25°C
D
VGS = –4.5V, ID = –5.8 A
= –2.5V, ID = –5.0 A
V
GS
= –4.5V,ID = –5.8A,TJ=125°C
V
GS
gFS Forward Transconductance VDS = –10 V, ID = –5.8 A 22 S
–0.4 –1.0 –1.5 V
3
26
38
35
30
43
mV/°C
mΩ
Dynamic Characteristics
C
Input Capacitance 1330 pF
iss
C
Output Capacitance 270 pF
oss
C
Reverse Transfer Capacitance
rss
RG Gate Resistance VGS = 15 mV, f = 1.0 MHz 12
V
= –10 V, V
DS
f = 1.0 MHz
= 0 V,
GS
230 pF
Ω
Switching Characteristics (Note 2)
t
Turn–On Delay Time 13 24 ns
d(on)
tr Turn–On Rise Time 8 16 ns
t
Turn–Off Delay Time 91 145 ns
d(off)
tf Turn–Off Fall Time
Qg Total Gate Charge 17 23 nC
Qgs Gate–Source Charge 3 nC
Qgd Gate–Drain Charge
V
= –10 V, ID = –1 A,
DD
= –4.5 V, R
V
GS
= –10 V, ID = –5.8 A,
V
DS
= –4.5 V
V
GS
GEN
= 6 Ω
60 96 ns
6 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –1.3 A
VSD Drain–Source Diode Forward
Voltage
trr Diode Reverse Recovery Time IF = –5.8 A, diF/dt = 100A/µs 40 60 ns
Qrr Diode Reverse Recovery Charge IF = –5.8 A, diF/dt = 100A/µs 15 23 nC
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain
θJA
pins. R
a. 78°C/W when mounted on a 1in2 pad of 2oz copper on FR-4 board.
b. 156°C/W when mounted on a minimum pad.
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
VGS = 0 V, IS = –1.3 A (Note 2) –0.7 –1.2 V
FDC608PZ Rev B (W)
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