Fairchild FAN21SV04 service manual

September 2011

FAN21SV04 — TinyBuck™ 4A, 24V Single-Input Integrated Synchronous Buck Regulator

Features

 Single-Supply Operation with 4A Output Current  Wide Input Range with Dual Supply: 3.0V to 24V  Wide Output Voltage Range: 0.8V to 80% V

IN

 Over 94% Peak Efficiency  1% Reference Accuracy Over Temperature  Fully Synchronous Operation with Integrated

Schottky Diode on Low-Side MOSFET Boosts Efficiency

 Single Supply Device for V

> 6.5V – 24V

IN

 Programmable Frequency Operation (200-

600KHz)

 Synchronizable to External Clock with

Master/Slave Provisions

 Power-Good Signal  Accepts Ceramic Capacitors on Output  External Compensation for Flexible Design  Starts on Pre-Bias Outputs  Integrated Bootstrap Diode  Programmable Over-Current Protection  Under-Voltage, Over-Voltage, and Thermal-

Shutdown Protections

 5x6mm, 25-Pin, 3-Pad MLP Package

Applications



Servers & Telecom

 Graphics Cards & Displays  Computing Systems  Set-Top Boxes & Game Consoles  Point-of-Load Regulation

Description

The FAN21SV04 TinyBuck™ is a highly efficient, small-footprint, programmable-frequency, 4A, integrated synchronous buck regulator.

FAN21SV04 contains both synchronous MOSFETs and a controller/driver with optimized interconnects in one package, which enables designers to solve highcurrent requirements in a small area with minimal external components, thereby reducing cost. Onboard internal 5V regulator enables single-supply operation for input voltages >6.5V.

The FAN21SV04 can be configured to drive multiple slave devices OR synchronize to an external system clock. In slave mode, FAN21SV04 may be set up to be free-running in the absence of a master clock signal.

External compensation, programmable switching frequency, and current-limit features allow for design optimization and flexibility. High-frequency operation allows for all-ceramic solutions.

Fairchild’s advanced BiCMOS power process, combined with low-R thermally efficient MLP package, provide the ability to dissipate high power in a small package. Integration helps minimize critical inductances, making layout simpler and more efficient compared to discrete solutions.

Output over-voltage, under-voltage, over-current, and thermal-shutdown protections help protect the device from damage during fault conditions. FAN21SV04 prevents pre-biased output discharge during startup in point-of-load applications.

internal MOSFETs and a

DS(ON)

Related Resources

 TinyCalc™ Calculator Design Tool  AN-8022 — TinyCalc™ Calculator User Guide

Ordering Information

Operating

Part Number

FAN21SV04MPX -10°C to 85°C Molded Leadless Package (MLP) 5x6mm Tape and Reel FAN21SV04EMPX -40°C to 85°C Molded Leadless Package (MLP) 5x6mm Tape and Reel

Temperature Range Package

Packing

Method

Typical Application Diagram

FAN21SV04 — TinyBuck™ 4A, 24V Single-Input Integrated Synchronous Buck Regulator

IN

VIN

Boot

C

HF

Enable

Power

Good

C

IN

5V_Reg

C4

R5

VIN_Reg

Reg

C5

RAMP

R

RAMP

R

ILIM

R

EN

ILIM

T

R

T

AGND

Diode

PWM

+

DRIVER

Q1

Q2

MOSFETS

COMP

C2

POWER

C1

R2

BOOT

SW

PGND

CLK

FB

R3

C

BOOT

L

C

R

OUT

R1

C3

BIAS

Figure 1. Typical Application as Master at V

=6.5V to 24V

IN

Block Diagram

VIN_Reg

5V_Reg

ILIM

COMP

FB

CLK

EN

RAMP

SS

OSC

Reg

VREF

Int ref

Error Amplifier

RAMP

GEN

IILIM

5V

Current Limit Comparator

PWM Comparator

Summing Amplifier

Current

Sense

Figure 2. Block Diagram

RSQ

Boot

Diode

Gate

Drive

Circuit

BOOT

IN

V

SW

AGND

PGND

CBOOT

L

VOUT

C

OUT

Pin Configuration

Figure 3. MLP 5x6mm Pin Configuration (Bottom View)

Pad / Pin Definitions

Pad / Pin Name Description

P1, 6-12 SW

P2, 3-5 VIN

P3, 21-23 PGND

1 BOOT

2 VIN_Reg

13 PGOOD

14 EN

15 5V_Reg

16 AGND

17 ILIM

18 RT

19 FB 20 COMP

24 CLK

25 RAMP

Switching Node. Junction of high-side and low-side MOSFETs. Power Conversion Input Voltage. Connect to the main input power source. Power Ground. Power return and Q2 source. High-Side Drive BOOT Voltage. Connect through capacitor (C

internal synchronous bootstrap diode to recharge the capacitor on this pin to 5V_Reg when SW is LOW.

Regulator Input Voltage. Input voltage to the internal regulator. Connect to input voltage >6.5V with 10resistor and a 1µF bypass capacitor at the pin (see Figure 10).

Power-Good. An open-drain output that pulls LOW when the voltage on the FB pin is outside the specified limits. PGOOD does not assert HIGH until the fault latch is enabled (see Figure 31).

ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the regulator after a latched-fault condition. This input has an internal pull-up. When a latched fault occurs, EN is discharged by a current sink.

5V Regulator Output. Internal regulator output that provides power for the IC’s logic and analog circuitry. This pin should be connected to AGND through a >2.2µf X5R/X7R capacitor.

Analog Ground. The signal ground for the IC. All internal control voltages are referred to this pin. Tie this pin to the ground island/plane through the lowest impedance connection.

Current Limit. A resistor (R limit trip threshold lower than the internal default setting.

Switching Frequency and Master/Slave Set. Connecting a resistor (R switching frequency and configures the CLK pin as an output (master). Tying this pin to 5V_Reg through a resistor configures the CLK signal as an input (slave) and establishes the free-running switching frequency.

Output Voltage Feedback. Connect through a resistor divider to the output voltage. Compensation. Error amplifier output. Connect the external compensation network

between this pin and FB. Clock. Bi-directional signal pin, depending on master/slave configuration. When configured

as a master, this pin represents the clock output that connects directly to the slave(s) for synchronizing with 180° phase shift.

Ramp Amplitude. A resistor (R amplitude and also provides voltage feedforward functionality.

) from this pin to AGND can be used to program the current-

ILIM

) connected from this pin to VIN sets the internal ramp

RAMP

) to SW. The IC has an

BOOT

) to AGND sets the

T

FAN21SV04 — TinyBuck™ 4A, 24V Single-Input Integrated Synchronous Buck Regulator

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

Parameter Conditions Min. Max. Units

VIN, VIN_Reg to AGND AGND=PGND 28 V

5V_Reg to AGND AGND=PGND 6 V

BOOT to PGND 35 V

BOOT to SW -0.5 6.0 V

SW to PGND

Continuous -0.5 24.0 Transient (t < 20ns, f < 600KHz) -5 30

V

All other pins -0.3 6.0 V

ESD

Electrostatic Discharge Protection Level

Human Body Model, JESD22-A114

Charged Device Model, JESD22-C101

1.5 kV

2.5

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol Parameter Conditions Min. Typ. Max Units

fSW Switching Frequency 200 500 600 KHz V

IN,

VIN_Reg

Supply Voltage for Power and Bias

TA Ambient Temperature

VIN to PGND 3.0 24.0 VIN_Reg to AGND 6.5 24.0 FAN21SV04MPX -10 +85 FAN21SV04EMPX -40 +85

V

°C

TJ Junction Temperature +125 °C

Thermal Information

Symbol Parameter Min. Typ. Max. Units

T

Storage Temperature -65 +150 °C

STG

TL Lead Soldering Temperature, 30 Seconds +300 °C

P1 (Q2) 4

Thermal Resistance: Junction-to-Case

Thermal Resistance: Junction-to-Mounting Surface



JC

J-PCB

PD Total Power Dissipation in the package, TA=25°C

Note:

1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 38. Actual results are dependent upon mounting method and surface related to the design.

P2 (Q1) 7

°C/W

P3 4

(1)

35 °C/W

(1)

2.8 W

FAN21SV04 — TinyBuck™ 4A, 24V Single-Input Integrated Synchronous Buck Regulator

Electrical Characteristics

Recommended operating conditions and using the circuit shown in Figure 1, with VIN, VIN_Reg=12V, unless otherwise noted.

Parameter Conditions Min. Typ. Max. Units

Power Supplies

Operating Current (VIN+VIN_Reg)

VIN_Reg Operating Current VIN_Reg Quiescent Current EN=High, FB=0.9V 4 5 mA

VIN_Reg Standby Current EN=0, VIN=12V 1 mA 5V_Reg Output Voltage 5V_Reg Max. Current Load VIN_Reg=12V 5 mA VIN_Reg UVLO Threshold Reference

Reference Voltage measured at FB (See Figure 4 for Temperature Coefficient)

Oscillator

Frequency Frequency in Slave Mode

Compared to Master Mode Minimum On Time

(2)

40 65 ns Duty Cycle VIN=6.5V, fSW=600KHz 80 85 % Ramp Amplitude,

Peak–to-Peak Minimum Off Time

(2)

100 150 ns Synchronization CLK Output Pulse Width Master (RT to GND) 70 85 100 ns CLK Output Sink Current Master, V CLK Output Source Current Master, V CLK Input Pulse Width Slave: V CLK Input Source Current Slave: V CLK Input Threshold, Rising Slave 1.73 1.83 1.93 V Soft-Start V

to Regulation (T

OUT

Fault Enable/SSOK (T

)

0.8

) 3.1 ms

1.0

Error Amplifier

DC Gain Gain Bandwidth Product Output Voltage Swing (V

(2)

COMP

Output Current, Sourcing 5V_Reg=5V, V Output Current, Sinking 5V_Reg=5V, V FB Bias Current VFB=0.8V, TA=25°C -850 -650 -450 nA

Note:

2. Specifications guaranteed by design and characterization; not production tested.

VIN=12V, 5V_Reg Open, CLK Open, f

=500KHz, No Load

SW

EN=High, 5V_Reg Open, CLK Open, fSW=500KHz

Internal V

Regulator, No Load,

CC

6.5V<VIN_Reg<24V

Rising V

, VIN=VIN_Reg 5.6 6.3 V

IN

22 30 mA

11 mA

4.7 5.0 5.3 V

Falling VIN, VIN=VIN_Reg 5 V

FAN21SV04MPX, T FAN21SV04EMPX, TA=25°C 795 800 805

=50k to GND (Master Mode)

R

T

RT=24k to GND (Master Mode) RT=24 k to 50k to 5V_Reg

(Slave Mode)

VIN=16V, 1.8V

=0.4V 0.25 0.35 mA

CLK

=2V -2.5 -2.0 mA

CLK

> 2V 50 ns

CLK

=1V -230 -200 -170 µA

CLK

Frequency=500KHz

=25°C 794 800 806

A

255 300 345 540 600 660

KHz

-15 +15 %

, RT=30k, R

OUT

RAMP

=200k

0.5 V

2.5 ms

mV

80 85 dB

12 15 MHz

VIN_Reg > 6.5V

) 0.4 4.0 V

=2.2V 1.5 2.2 2.5 mA

COMP

=1.2V 0.8 1.2 1.5 mA

COMP

FAN21SV04 — TinyBuck™ 4A, 24V Single-Input Integrated Synchronous Buck Regulator

Electrical Characteristics (Continued)

Recommended operating conditions using the circuit shown in Figure 1 with VIN, V

Parameter Conditions Min. Typ. Max. Units

Control Functions

EN Threshold, Rising 1.35 2.00 V EN Hysteresis 250 mV EN Pull-Up Resistance VIN_Reg >6.5V 800 EN Discharge Current Auto-Restart Mode, VIN_Reg>6.5V 1 µA FB OK Drive Resistance 800 1000

(3)

-14.0 -11.0 -8.0

(3)

+7.0 +10.0 +13.5

PGOOD Low Threshold

PGOOD Low Voltage I PGOOD Leakage Current V

FB < V FB > V

OUT

PGOOD

, 2 Consecutive Clock Cycles

REF

, 2 Consecutive Clock Cycles

REF

< 2mA 0.4 V

=5V 0.2 1.0 µA

Protection and Shutdown

R

open, fSW=500KHz, V

Current Limit

I

Current VIN_Reg > 6.5V, TA=25°C -11 -10 -9 µA

LIM

Over-Temperature Shutdown Over-Temperature Hysteresis +30 °C

ILIM

=200k16 Consecutive Clock

R

RAMP

(3)

Cycles

Internal Temperature

Over-Voltage Threshold 2 Consecutive Clock Cycles Under-Voltage Shutdown 16 Consecutive Clock Cycles

=1.8V,

OUT

(3)

110 115 120 %V

(3)

68 73 78 %V Fault-Discharge Threshold Measured at FB pin 250 mV Fault-Discharge Hysteresis Measured at FB pin (VFB ~500mV) 250 mV

Note:

3. Delay times are not tested in production. Guaranteed by design.

=12V, unless otherwise noted.

IN_Reg

K

%V

REF

5.5 6.5 7.5 A

+155 °C

OUT

Fairchild FAN21SV04 service manual

Specifications and Main Features

Frequently Asked Questions

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