Fairchild 74VHC4040 service manual
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74VHC4040
12-Stage Binary Counter
74VHC4040 12-Stage Binary Counter
August 1993
Revised April 1999
General Description
The VHC4040 is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It achieves
the high-speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissipation. The VHC4040 is a 1 2-stage counter which increments on the negative edge of the input clock and all
outputs are reset to a low level by ap plying a logical high
on the reset input. An input protection circui t insures that
0V to 7V can be applied to the inputs wi thout r egard to the
supply voltage. This dev ice can be used to inter face 5V to
3V systems and two supply systems such as battery
backup. T his ci r c ui t pr ev e nts d e vi ce d est r uc t io n du e to m is matched supply and input voltages.
Features
■ High speed; f
■ Low power dissipation: I
■ High noise immunity: V
■ Power down protection is provided on all inputs
■ Wide operating voltage ran ge: V
■ Low noise: V
■ Pin and function compatible with 74HC4040
= 210 MHz at VCC = 5V
MAX
= 4 µA (max) at TA = 25°C
CC
=V
NIH
NIL
= 0.8V (max)
OLP
= 28% VCC (min)
(opr) = 2V − 5.5V
CC
Ordering Code:
Order Number Package Number Package Description
74VHC4040M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74VHC4040MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC4040N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Surface mount pack ages are also available on Tape and Reel. Specify by appending the s uffix let te r “X” to the ordering code.
Connection Diagram Pin Descriptions
Pin Names Description
Q
0–Q11
CP
MR Master Reset
Flip-Flop Outputs
Negative Edged Triggered Clock
© 1999 Fairchild Semiconductor Corporation DS011641.prf www.fairchildsemi.com
Logic Symbols
74VHC4040
Logic Diagram
IEEE/IEC
Timing Diagram
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Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) −0.5V to +7.0V
DC Input Voltage (V
DC Output Voltage (V
Input Diode Current (I
Output Diode Current (I
DC Output Current (I
/GND Current (ICC) ±75 mA
DC V
CC
Storage Temperature (T
Lead Temperature (T
) −0.5V to +7.0V
IN
) −0.5V to VCC + 0.5V
OUT
) −20 mA
IK
) ±20 mA
OK
) ±25 mA
OUT
) −65°C to +150°C
STG
)
L
(Soldering, 10 seconds) 260°C
Conditions
Supply Voltage (V
Input Voltage (V
Output Voltage (V
Operating Temperature (T
Input Rise and Fall Time (t
= 3.3V ± 0.3V 0 ∼ 100 ns/V
V
CC
= 5.0V ± 0.5V 0 ∼ 20 ns/V
V
CC
Note 1: Absolute Maximum Ratings are valu es beyond whic h the device
may be damaged or ha ve its useful life impaire d. The datab ook specific ations should be met, without exception, to ensure that the system design is
reliable over its p ower supp ly, temperature, and o utput/input loading variables. Fairchild does not recommend operation outside databook specifications.
Note 2: Unused inputs must be held HIGH or LOW. They may not float
(Note 2)
)2.0V to +5.5V
CC
)0V to +5.5V
IN
)0V to V
OUT
) −40°C to +85°C
OPR
, tf)
r
DC Electrical Characteristics
Symbol Parameter
V
IH
V
IL
V
OH
V
OL
I
IN
I
CC
HIGH Level Input 2.0 1.50 1.50
Voltage 3.0 − 5.5 0.7 V
LOW Level Input 2.0 0.50 0.50
Voltage 3.0 − 5.5 0.3 V
HIGH Level Output 2.0 1.9 2.0 1.9
Voltage 3.0 2.9 3.0 2.9
LOW Level Output 2.0 0.0 0.1 0.1
Voltage 3.0 0.0 0.1 0.1
Input Leakage Current 0 − 5.5 ±0.1 ±1.0 µAVIN = 5.5V or GND
Quiescent Supply Current 5.5 4.0 40.0 µAVIN = VCC or GND
V
CC
(V)
4.5 4.4 4.5 4.4
3.0 2.58 2.48 IOH = −4 mA
4.5 3.94 3.80 IOH = −8 mA
4.5 0.0 0.1 0.1
3.0 0.36 0.44 IOL = 4 mA
4.5 0.36 0.44 IOL = 8 mA
TA = 25°CT
Min Typ Max Min Max
CC
CC
= −40°C to +85°C
A
0.7 V
CC
0.3 V
Units Conditions
V
V
CC
V
V
VIN = V
or V
VIN = V
or V
IOH = −50 µA
IH
IL
IOL = 50 µA
IH
IL
74VHC4040
CC
3 www.fairchildsemi.com
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