Fairchild 74VHC393 service manual
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74VHC393 — Dual 4-Bit Binary Counter
December 2007
74VHC393
Dual 4-Bit Binary Counter
Features
■
High Speed: f
Low power dissipation: I
■
■
High noise immunity: V
Power down protection is provided on all inputs
■
■
Pin and function compatible with 74HC393
170MHz (Typ.) at T
MAX
CC
NIH
A
4µA (Max.) at T
V
28% V
NIL
25°C
A
(Min.)
CC
25°C
General Description
The VHC393 is an advanced high speed CMOS 4-bit
Binary Counter fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. It contains two independent counter circuits in one package, so that counting or
frequency division of 8 binary bits can be achieved with
one IC. This device changes state on the negative going
transition of the CLOCK
to “0” (Q
regardless of other inputs.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mismatched supply and input voltages.
–Q
0
3
pulse. The counter can be reset
“L”) by a HIGH at the CLEAR input
Ordering Information
Package
Order Number
74VHC393M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
74VHC393SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC393MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Number Package Description
Narrow
4.4mm Wide
All packages are lead free per JEDEC: J-STD-020B standard.
©1998 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC393 Rev. 1.5.0
74VHC393 — Dual 4-Bit Binary Counter
Connection Diagram
Pin Descriptions
Pin Names Description
CLR1, CLR2 Clear Inputs
CP
, CP
1
2
QA, QB, QC, QD Outputs
Clock Pulse Inputs
Logic Symbol/s
IEEE/IEC
Truth Table
Inputs Outputs
CP CLR QA QB QC QD
X H L L L L
L Count Up
L No Change
X: Don’t Care
System Diagram
©1998 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC393 Rev. 1.5.0 2
Timing Chart
74VHC393 — Dual 4-Bit Binary Counter
©1998 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC393 Rev. 1.5.0 3
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