Fairchild 74VHC132 service manual

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74VHC132 — Quad 2-Input NAND Schmitt Trigger

December 2007

74VHC132
Quad 2-Input NAND Schmitt Trigger

Features

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High Speed: t
Power down protection is provided on all inputs

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Low power dissipation: I
Low noise: V

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Pin and function compatible with 74HC132

3.9ns (Typ.) at V

PD

0.8V (Max.)

OLP

2µA (Max.) at T

CC

CC

5V

A

25°C

General Description

The VHC132 is an advanced high speed CMOS 2-input
NAND Schmitt Trigger Gate fabricated with silicon gate
CMOS technology. It achieves the high-speed operation
similar to Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. Pin configuration and
function are the same as the VHC00 but the inputs have
hysteresis between the positive-going and negative­going input thresholds, which are capable of transform­ing slowly changing input signals into sharply defined,
jitter-free output signals. Thus greater noise margin then
conventional gates is provided. An input protection
circuit ensures that 0V to 7V can be applied to the input
pins without regard to the supply voltage. This device
can be used to interface 5V to 3V systems and two
supply systems such as battery backup. This circuit
prevents device destruction due to mismatched supply
and input voltages.

Ordering Information

Package

Order Number

74VHC132M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"

74VHC132SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC132MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

Number Package Description

Narrow

4.4mm Wide

All packages are lead free per JEDEC: J-STD-020B standard.

©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC132 Rev. 1.5.0

74VHC132 — Quad 2-Input NAND Schmitt Trigger

Connection Diagram

Pin Description

Pin Names Description

A

, B

n

n

Y

n

Logic Diagram

Inputs
Outputs

Truth Table

ABY

LLH

LHH
HLH
HHL

©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC132 Rev. 1.5.0 2

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.

Symbol Parameter Rating

V

V

I

T

CC

V

IN

OUT

I

IK

I

OK

OUT

I

CC

STG

T

L

Supply Voltage –0.5V to +7.0V
DC Input Voltage –0.5V to +7.0V
DC Output Voltage –0.5V to V

CC

+ 0.5V
Input Diode Current –20mA
Output Diode Current ±20mA
DC Output Current ±25mA
DC V

/ GND Current ±50mA

CC

Storage Temperature –65°C to +150°C
Lead Temperature (Soldering, 10 seconds) 260°C

74VHC132 — Quad 2-Input NAND Schmitt Trigger

Recommended Operating Conditions

(1)

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.

Symbol Parameter Rating

V

CC

V

IN

V

OUT

T

OPR

Note:

1. Unused inputs must be held HIGH or LOW. They may not float.

Supply Voltage 2.0V to +5.5V
Input Voltage 0V to +5.5V
Output Voltage 0V to V
Operating Temperature –40°C to +85°C

CC

©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC132 Rev. 1.5.0 3